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49633b5f44
Summary: This patch adds assembly-level support for a new Arm M-profile architecture extension, Custom Datapath Extension (CDE). A brief description of the extension is available at https://developer.arm.com/architectures/instruction-sets/custom-instructions The latest specification for CDE is currently a beta release and is available at https://static.docs.arm.com/ddi0607/aa/DDI0607A_a_armv8m_arm_supplement_cde.pdf CDE allows chip vendors to add custom CPU instructions. The CDE instructions re-use the same encoding space as existing coprocessor instructions (such as MRC, MCR, CDP etc.). Each coprocessor in range cp0-cp7 can be configured as either general purpose (GCP) or custom datapath (CDEv1). This configuration is defined by the CPU vendor and is provided to LLVM using 8 subtarget features: cdecp0 ... cdecp7. The semantics of CDE instructions are implementation-defined, but the instructions are guaranteed to be pure (that is, they are stateless, they do not access memory or any registers except their explicit inputs/outputs). CDE requires the CPU to support at least Armv8.0-M mainline architecture. CDE includes 3 sets of instructions: * Instructions that operate on general purpose registers and NZCV flags * Instructions that operate on the S or D register file (require either FP or MVE extension) * Instructions that operate on the Q register file, require MVE The user-facing names that can be specified on the command line are the same as the 8 subtarget feature names. For example: $ clang -target arm-none-none-eabi -march=armv8m.main+cdecp0+cdecp3 tells the compiler that the coprocessors 0 and 3 are configured as CDEv1 and the remaining coprocessors are configured as GCP (which is the default). Reviewers: simon_tatham, ostannard, dmgreen, eli.friedman Reviewed By: simon_tatham Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D74044
138 lines
4.3 KiB
Plaintext
138 lines
4.3 KiB
Plaintext
# RUN: not llvm-mc -disassemble -triple=thumbv8m.main -mattr=+cdecp0 -mattr=+cdecp1 < %s 2>%t | FileCheck %s
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# RUN: FileCheck <%t --check-prefix=ERROR %s
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# GCP instructions
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# CHECK: mrc p3, #1, r3, c15, c15, #5
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[0x3f,0xee,0xbf,0x33]
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# CHECK-NEXT: mcr2 p3, #2, r2, c7, c11, #7
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[0x47,0xfe,0xfb,0x23]
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# Predication
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# CHECK: itte eq
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[0x06,0xbf]
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itte eq
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# CHECK-NEXT: cx1aeq p0, r3, #8191
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[0x3f,0xfe,0xbf,0x30]
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# CHECK-NEXT: cx2aeq p0, r2, r3, #123
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[0x43,0xfe,0xbb,0x20]
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# CHECK-NEXT: cx3ane p0, r1, r5, r7, #63
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[0xf5,0xfe,0xb1,0x70]
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# CHECK-NEXT: itte eq
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[0x06,0xbf]
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# CHECK-NEXT: cx1daeq p0, r0, r1, #8191
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[0x3f,0xfe,0xff,0x00]
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# CHECK-NEXT: cx2daeq p0, r0, r1, r3, #123
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[0x43,0xfe,0xfb,0x00]
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# CHECK-NEXT: cx3dane p0, r0, r1, r5, r7, #63
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[0xf5,0xfe,0xf0,0x70]
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# CX1
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# CHECK-NEXT: cx1 p0, r3, #8191
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[0x3f,0xee,0xbf,0x30]
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# CHECK-NEXT: cx1a p1, r2, #0
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[0x00,0xfe,0x00,0x21]
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# CHECK-NEXT: cx1d p0, r4, r5, #1234
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[0x09,0xee,0xd2,0x40]
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# CHECK-NEXT: cx1da p1, r2, r3, #1234
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[0x09,0xfe,0xd2,0x21]
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# CHECK-NEXT: cx1 p0, apsr_nzcv, #8191
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[0x3f,0xee,0xbf,0xf0]
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: warning: potentially undefined instruction encoding
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# CHECK-NEXT: cx1 p0, sp, #8191
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[0x3f,0xee,0xbf,0xd0]
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: warning: potentially undefined instruction encoding
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# CHECK-NEXT: cx1d p0, r12, sp, #1234
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[0x09,0xee,0xd2,0xc0]
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: warning: potentially undefined instruction encoding
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# CHECK-NEXT: cx1d p0, r2, r3, #1234
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[0x09,0xee,0xd2,0x30]
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# CX2
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# CHECK-NEXT: cx2 p0, r3, r7, #0
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[0x47,0xee,0x00,0x30]
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# CHECK-NEXT: cx2a p0, r1, r4, #511
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[0x74,0xfe,0xbf,0x10]
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# CHECK-NEXT: cx2d p0, r2, r3, r1, #123
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[0x41,0xee,0xfb,0x20]
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# CHECK-NEXT: cx2da p0, r2, r3, r7, #123
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[0x47,0xfe,0xfb,0x20]
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# CHECK-NEXT: cx2da p1, r10, r11, apsr_nzcv, #123
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[0x4f,0xfe,0xfb,0xa1]
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: warning: potentially undefined instruction encoding
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# CHECK-NEXT: cx2a p0, r1, sp, #511
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[0x7d,0xfe,0xbf,0x10]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x4f,0xfe,0xfb,0xe1]
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# CX3
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# CHECK-NEXT: cx3 p0, r1, r2, r3, #0
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[0x82,0xee,0x01,0x30]
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# CHECK-NEXT: cx3a p0, r1, r5, r7, #63
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[0xf5,0xfe,0xb1,0x70]
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# CHECK-NEXT: cx3d p1, r0, r1, r7, r1, #12
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[0x97,0xee,0xc0,0x11]
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# CHECK-NEXT: cx3da p0, r8, r9, r2, r3, #12
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[0x92,0xfe,0xc8,0x30]
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# CHECK-NEXT: cx3 p1, apsr_nzcv, r7, apsr_nzcv, #12
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[0x97,0xee,0x8f,0xf1]
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# CHECK-NEXT: cx3d p0, r8, r9, apsr_nzcv, apsr_nzcv, #12
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[0x9f,0xee,0xc8,0xf0]
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# ERROR: [[@LINE+2]]:{{[0-9]+}}: warning: potentially undefined instruction encoding
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# CHECK-NEXT: cx3 p0, r1, r2, sp, #0
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[0x82,0xee,0x01,0xd0]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x9f,0xee,0xce,0xf0]
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# VCX1
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x69,0xec,0x92,0x50]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x6f,0xfc,0xbf,0x31]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x20,0xed,0x00,0x00]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x2f,0xfd,0xbf,0x31]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x29,0xec,0xd2,0x20]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x2f,0xfd,0xff,0xa1]
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# VCX2
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x33,0xec,0x2f,0x00]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x7f,0xfc,0xb0,0x00]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x30,0xed,0x2f,0x00]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x3f,0xfd,0xb6,0x10]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x3e,0xed,0xfe,0x01]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x3f,0xfd,0xde,0x61]
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# VCX3
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x8f,0xec,0x90,0x00]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0xf8,0xfc,0xb5,0x01]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0x8f,0xed,0x87,0x00]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0xb6,0xfd,0xb6,0x11]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0xae,0xed,0xc0,0x00]
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# ERROR: [[@LINE+1]]:{{[0-9]+}}: warning: invalid instruction encoding
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[0xbe,0xfd,0x7e,0x61]
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