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3accf5501c
Accept r11 when targeting Windows on ARM rather than just low registers. Because we are in a thumb-2 only mode, this may be slightly more expensive in code size, but results in better code for the environment since it spills the frame register, which is generally desired for fast stack walking as per the ABI. llvm-svn: 249804
23 lines
535 B
LLVM
23 lines
535 B
LLVM
; RUN: llc -mtriple thumbv7-windows -filetype asm -o - %s | FileCheck %s
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declare void @callee(i32)
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define i32 @calleer(i32 %i) {
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entry:
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%i.addr = alloca i32, align 4
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%j = alloca i32, align 4
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store i32 %i, i32* %i.addr, align 4
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%0 = load i32, i32* %i.addr, align 4
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%add = add nsw i32 %0, 1
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store i32 %add, i32* %j, align 4
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%1 = load i32, i32* %j, align 4
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call void @callee(i32 %1)
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%2 = load i32, i32* %j, align 4
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%add1 = add nsw i32 %2, 1
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ret i32 %add1
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}
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; CHECK-NOT: push.w {r7, lr}
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; CHECK: push.w {r11, lr}
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