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3f021fa672
This patch marks the induction increment of the main induction variable of the vector loop as NUW when not folding the tail. If the tail is not folded, we know that End - Start >= Step (either statically or through the minimum iteration checks). We also know that both Start % Step == 0 and End % Step == 0. We exit the vector loop if %IV + %Step == %End. Hence we must exit the loop before %IV + %Step unsigned overflows and we can mark the induction increment as NUW. This should make SCEV return more precise bounds for the created vector loops, used by later optimizations, like late unrolling. At the moment quite a few tests still need to be updated, but before doing so I'd like to get initial feedback to make sure I am not missing anything. Note that this could probably be further improved by using information from the original IV. Attempt of modeling of the assumption in Alive2: https://alive2.llvm.org/ce/z/H_DL_g Part of a set of fixes required for PR50412. Reviewed By: mkazantsev Differential Revision: https://reviews.llvm.org/D103255
154 lines
8.1 KiB
LLVM
154 lines
8.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -loop-vectorize -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue < %s | FileCheck %s
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; RUN: opt -S -loop-vectorize < %s | FileCheck %s
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; This tests should produce the same result as with default options, and when tail folding
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; is preferred, because the vectorizer can't fold the tail by masking (due to an
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; outside user of %incdec.ptr in %end) and should fallback to a scalar epilogue.
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;
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; The first test (@basic_loop) simply relies on the command-line switches.
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; The second test (@metadata) specificies its tail-folding preference via metadata.
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; Both tests should always generate a scalar epilogue.
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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define void @basic_loop(i8* nocapture readonly %ptr, i32 %size, i8** %pos) {
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; CHECK-LABEL: @basic_loop(
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; CHECK-NEXT: header:
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; CHECK-NEXT: [[PTR0:%.*]] = load i8*, i8** [[POS:%.*]], align 4
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[SIZE:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[SIZE]], 4
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[SIZE]], [[N_MOD_VF]]
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; CHECK-NEXT: [[IND_END:%.*]] = sub i32 [[SIZE]], [[N_VEC]]
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; CHECK-NEXT: [[IND_END2:%.*]] = getelementptr i8, i8* [[PTR:%.*]], i32 [[N_VEC]]
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[OFFSET_IDX:%.*]] = sub i32 [[SIZE]], [[INDEX]]
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[OFFSET_IDX]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 0
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; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, i8* [[PTR]], i32 [[TMP1]]
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[NEXT_GEP]], i32 1
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i32 0
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to <4 x i8>*
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, <4 x i8>* [[TMP4]], align 1
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; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[NEXT_GEP]], i32 0
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to <4 x i8>*
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; CHECK-NEXT: store <4 x i8> [[WIDE_LOAD]], <4 x i8>* [[TMP6]], align 1
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
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; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop !0
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; CHECK: middle.block:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[SIZE]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[CMP_N]], label [[END:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[SIZE]], [[HEADER:%.*]] ]
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; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i8* [ [[IND_END2]], [[MIDDLE_BLOCK]] ], [ [[PTR]], [[HEADER]] ]
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; CHECK-NEXT: br label [[BODY:%.*]]
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; CHECK: body:
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; CHECK-NEXT: [[DEC66:%.*]] = phi i32 [ [[DEC:%.*]], [[BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
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; CHECK-NEXT: [[BUFF:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[BODY]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ]
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; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[BUFF]], i32 1
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; CHECK-NEXT: [[DEC]] = add nsw i32 [[DEC66]], -1
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; CHECK-NEXT: [[TMP8:%.*]] = load i8, i8* [[INCDEC_PTR]], align 1
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; CHECK-NEXT: store i8 [[TMP8]], i8* [[BUFF]], align 1
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; CHECK-NEXT: [[TOBOOL11:%.*]] = icmp eq i32 [[DEC]], 0
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; CHECK-NEXT: br i1 [[TOBOOL11]], label [[END]], label [[BODY]], !llvm.loop !2
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; CHECK: end:
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; CHECK-NEXT: [[INCDEC_PTR_LCSSA:%.*]] = phi i8* [ [[INCDEC_PTR]], [[BODY]] ], [ [[IND_END2]], [[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: store i8* [[INCDEC_PTR_LCSSA]], i8** [[POS]], align 4
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; CHECK-NEXT: ret void
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;
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header:
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%ptr0 = load i8*, i8** %pos, align 4
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br label %body
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body:
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%dec66 = phi i32 [ %dec, %body ], [ %size, %header ]
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%buff = phi i8* [ %incdec.ptr, %body ], [ %ptr, %header ]
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%incdec.ptr = getelementptr inbounds i8, i8* %buff, i32 1
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%dec = add nsw i32 %dec66, -1
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%0 = load i8, i8* %incdec.ptr, align 1
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store i8 %0, i8* %buff, align 1
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%tobool11 = icmp eq i32 %dec, 0
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br i1 %tobool11, label %end, label %body
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end:
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store i8* %incdec.ptr, i8** %pos, align 4
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ret void
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}
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define void @metadata(i8* nocapture readonly %ptr, i32 %size, i8** %pos) {
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; CHECK-LABEL: @metadata(
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; CHECK-NEXT: header:
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; CHECK-NEXT: [[PTR0:%.*]] = load i8*, i8** [[POS:%.*]], align 4
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[SIZE:%.*]], 4
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[SIZE]], 4
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[SIZE]], [[N_MOD_VF]]
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; CHECK-NEXT: [[IND_END:%.*]] = sub i32 [[SIZE]], [[N_VEC]]
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; CHECK-NEXT: [[IND_END2:%.*]] = getelementptr i8, i8* [[PTR:%.*]], i32 [[N_VEC]]
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[OFFSET_IDX:%.*]] = sub i32 [[SIZE]], [[INDEX]]
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[OFFSET_IDX]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[INDEX]], 0
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; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, i8* [[PTR]], i32 [[TMP1]]
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[NEXT_GEP]], i32 1
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i32 0
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to <4 x i8>*
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, <4 x i8>* [[TMP4]], align 1
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; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, i8* [[NEXT_GEP]], i32 0
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to <4 x i8>*
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; CHECK-NEXT: store <4 x i8> [[WIDE_LOAD]], <4 x i8>* [[TMP6]], align 1
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
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; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop !4
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; CHECK: middle.block:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[SIZE]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[CMP_N]], label [[END:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[SIZE]], [[HEADER:%.*]] ]
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; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i8* [ [[IND_END2]], [[MIDDLE_BLOCK]] ], [ [[PTR]], [[HEADER]] ]
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; CHECK-NEXT: br label [[BODY:%.*]]
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; CHECK: body:
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; CHECK-NEXT: [[DEC66:%.*]] = phi i32 [ [[DEC:%.*]], [[BODY]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
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; CHECK-NEXT: [[BUFF:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[BODY]] ], [ [[BC_RESUME_VAL1]], [[SCALAR_PH]] ]
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; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[BUFF]], i32 1
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; CHECK-NEXT: [[DEC]] = add nsw i32 [[DEC66]], -1
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; CHECK-NEXT: [[TMP8:%.*]] = load i8, i8* [[INCDEC_PTR]], align 1
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; CHECK-NEXT: store i8 [[TMP8]], i8* [[BUFF]], align 1
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; CHECK-NEXT: [[TOBOOL11:%.*]] = icmp eq i32 [[DEC]], 0
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; CHECK-NEXT: br i1 [[TOBOOL11]], label [[END]], label [[BODY]], !llvm.loop !5
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; CHECK: end:
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; CHECK-NEXT: [[INCDEC_PTR_LCSSA:%.*]] = phi i8* [ [[INCDEC_PTR]], [[BODY]] ], [ [[IND_END2]], [[MIDDLE_BLOCK]] ]
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; CHECK-NEXT: store i8* [[INCDEC_PTR_LCSSA]], i8** [[POS]], align 4
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; CHECK-NEXT: ret void
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;
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header:
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%ptr0 = load i8*, i8** %pos, align 4
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br label %body
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body:
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%dec66 = phi i32 [ %dec, %body ], [ %size, %header ]
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%buff = phi i8* [ %incdec.ptr, %body ], [ %ptr, %header ]
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%incdec.ptr = getelementptr inbounds i8, i8* %buff, i32 1
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%dec = add nsw i32 %dec66, -1
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%0 = load i8, i8* %incdec.ptr, align 1
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store i8 %0, i8* %buff, align 1
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%tobool11 = icmp eq i32 %dec, 0
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br i1 %tobool11, label %end, label %body, !llvm.loop !1
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end:
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store i8* %incdec.ptr, i8** %pos, align 4
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ret void
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}
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!1 = distinct !{!1, !2, !3}
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!2 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
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!3 = !{!"llvm.loop.vectorize.enable", i1 true}
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