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llvm-mirror/lib/Target/ARM/Disassembler
Johnny Chen 41abb5b0f7 It used to be that t_addrmode_s4 was used for both:
o A8.6.195 STR (register) -- Encoding T1
o A8.6.193 STR (immediate, Thumb) -- Encoding T1

It has been changed so that now they use different addressing modes
and thus different MC representation (Operand Infos).  Modify the
disassembler to reflect the change, and add relevant tests.

llvm-svn: 127833
2011-03-17 22:04:05 +00:00
..
ARMDisassembler.cpp LLVM combines the offset mode of A8.6.199 A1 & A2 into STRBT. 2011-03-09 20:01:14 +00:00
ARMDisassembler.h
ARMDisassemblerCore.cpp There were two issues fixed: 2011-03-15 22:27:33 +00:00
ARMDisassemblerCore.h
CMakeLists.txt CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86. 2010-12-29 03:59:27 +00:00
Makefile
ThumbDisassemblerCore.h It used to be that t_addrmode_s4 was used for both: 2011-03-17 22:04:05 +00:00