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https://github.com/RPCS3/llvm-mirror.git
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7729bf075d
These were selecting directly to the VOP2 form instead of VOP3 like the i32 instructions. Fixes regressions in future commits where an immediate isn't folded because it was initially used for the second operand. Because uniform 16-bit operations are promoted to i32, it's difficult to get a simple testcase where this matters. Fold failures in SIFoldOperands here tend to be hidden by commute and fold in SIShrinkInstructions. llvm-svn: 289189
150 lines
6.7 KiB
LLVM
150 lines
6.7 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_add_i16:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: flat_load_ushort [[B:v[0-9]+]]
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]
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; VI-NEXT: buffer_store_short [[ADD]]
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define void @v_test_add_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid
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%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
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%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
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%a = load volatile i16, i16 addrspace(1)* %gep.in0
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%b = load volatile i16, i16 addrspace(1)* %gep.in1
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%add = add i16 %a, %b
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store i16 %add, i16 addrspace(1)* %out
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_add_i16_constant:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0x7b, [[A]]
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; VI-NEXT: buffer_store_short [[ADD]]
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define void @v_test_add_i16_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid
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%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
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%a = load volatile i16, i16 addrspace(1)* %gep.in0
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%add = add i16 %a, 123
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store i16 %add, i16 addrspace(1)* %out
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_add_i16_neg_constant:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xfffffcb3, [[A]]
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; VI-NEXT: buffer_store_short [[ADD]]
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define void @v_test_add_i16_neg_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid
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%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
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%a = load volatile i16, i16 addrspace(1)* %gep.in0
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%add = add i16 %a, -845
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store i16 %add, i16 addrspace(1)* %out
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_add_i16_inline_neg1:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]], -1, [[A]]
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; VI-NEXT: buffer_store_short [[ADD]]
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define void @v_test_add_i16_inline_neg1(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid
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%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
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%a = load volatile i16, i16 addrspace(1)* %gep.in0
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%add = add i16 %a, -1
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store i16 %add, i16 addrspace(1)* %out
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_add_i16_zext_to_i32:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: flat_load_ushort [[B:v[0-9]+]]
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]
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; VI-NEXT: buffer_store_dword [[ADD]]
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define void @v_test_add_i16_zext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid
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%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
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%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
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%a = load volatile i16, i16 addrspace(1)* %gep.in0
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%b = load volatile i16, i16 addrspace(1)* %gep.in1
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%add = add i16 %a, %b
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%ext = zext i16 %add to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_add_i16_zext_to_i64:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: flat_load_ushort [[B:v[0-9]+]]
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; VI-DAG: v_add_u16_e32 v[[ADD:[0-9]+]], [[B]], [[A]]
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; VI-DAG: v_mov_b32_e32 v[[VZERO:[0-9]+]], 0
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; VI: buffer_store_dwordx2 v{{\[}}[[ADD]]:[[VZERO]]{{\]}}, off, {{s\[[0-9]+:[0-9]+\]}}, 0{{$}}
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define void @v_test_add_i16_zext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid
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%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
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%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
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%a = load volatile i16, i16 addrspace(1)* %gep.in0
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%b = load volatile i16, i16 addrspace(1)* %gep.in1
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%add = add i16 %a, %b
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%ext = zext i16 %add to i64
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store i64 %ext, i64 addrspace(1)* %out
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i32:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: flat_load_ushort [[B:v[0-9]+]]
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]
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; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16
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; VI-NEXT: buffer_store_dword [[SEXT]]
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define void @v_test_add_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid
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%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
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%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
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%a = load i16, i16 addrspace(1)* %gep.in0
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%b = load i16, i16 addrspace(1)* %gep.in1
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%add = add i16 %a, %b
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%ext = sext i16 %add to i32
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store i32 %ext, i32 addrspace(1)* %out
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ret void
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}
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; FIXME: Need to handle non-uniform case for function below (load without gep).
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; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i64:
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; VI: flat_load_ushort [[A:v[0-9]+]]
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; VI: flat_load_ushort [[B:v[0-9]+]]
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; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]
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; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16
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; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
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; VI-NEXT: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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define void @v_test_add_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid
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%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
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%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
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%a = load i16, i16 addrspace(1)* %gep.in0
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%b = load i16, i16 addrspace(1)* %gep.in1
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%add = add i16 %a, %b
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%ext = sext i16 %add to i64
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store i64 %ext, i64 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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