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e5c2597507
Return bool instead of void so that it is natural to put the calls into asserts. llvm-svn: 267033
102 lines
3.2 KiB
C++
102 lines
3.2 KiB
C++
//==-- llvm/CodeGen/GlobalISel/RegisterBank.h - Register Bank ----*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file declares the API of register banks.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_GLOBALISEL_REGBANK_H
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#define LLVM_CODEGEN_GLOBALISEL_REGBANK_H
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#include "llvm/ADT/BitVector.h"
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namespace llvm {
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// Forward declarations.
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class RegisterBankInfo;
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class raw_ostream;
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class TargetRegisterClass;
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class TargetRegisterInfo;
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/// This class implements the register bank concept.
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/// Two instances of RegisterBank must have different ID.
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/// This property is enforced by the RegisterBankInfo class.
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class RegisterBank {
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private:
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unsigned ID;
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const char *Name;
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unsigned Size;
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BitVector ContainedRegClasses;
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/// Sentinel value used to recognize register bank not properly
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/// initialized yet.
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static const unsigned InvalidID;
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/// Only the RegisterBankInfo can create RegisterBank.
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/// The default constructor will leave the object in
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/// an invalid state. I.e. isValid() == false.
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/// The field must be updated to fix that.
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RegisterBank();
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friend RegisterBankInfo;
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public:
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/// Get the identifier of this register bank.
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unsigned getID() const { return ID; }
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/// Get a user friendly name of this register bank.
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/// Should be used only for debugging purposes.
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const char *getName() const { return Name; }
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/// Get the maximal size in bits that fits in this register bank.
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unsigned getSize() const { return Size; }
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/// Check whether this instance is ready to be used.
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bool isValid() const;
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/// Check if this register bank is valid. In other words,
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/// if it has been properly constructed.
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///
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/// \note This method does not check anything when assertions are disabled.
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///
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/// \return True is the check was successful.
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bool verify(const TargetRegisterInfo &TRI) const;
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/// Check whether this register bank covers \p RC.
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/// In other words, check if this register bank fully covers
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/// the registers that \p RC contains.
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/// \pre isValid()
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bool covers(const TargetRegisterClass &RC) const;
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/// Check whether \p OtherRB is the same as this.
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bool operator==(const RegisterBank &OtherRB) const;
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bool operator!=(const RegisterBank &OtherRB) const {
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return !this->operator==(OtherRB);
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}
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/// Dump the register mask on dbgs() stream.
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/// The dump is verbose.
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void dump(const TargetRegisterInfo *TRI = nullptr) const;
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/// Print the register mask on OS.
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/// If IsForDebug is false, then only the name of the register bank
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/// is printed. Otherwise, all the fields are printing.
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/// TRI is then used to print the name of the register classes that
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/// this register bank covers.
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void print(raw_ostream &OS, bool IsForDebug = false,
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const TargetRegisterInfo *TRI = nullptr) const;
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};
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inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
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RegBank.print(OS);
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return OS;
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}
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} // End namespace llvm.
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#endif
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