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2d034feb0d
Summary: Before this change, callee-save registers would be rounded up to even pairs of GPRs and FPRs. This change eliminates these extra padding load/stores, though it does keep the stack allocation the same size unless both the GPR and FPR sets have an odd size, in which case one full pair stack slot (16 bytes) is saved. This optimization cannot currently be done for MachO targets since they rely on a fast-path .debug_frame equivalent that can only encode callee-save registers as pairs. Reviewers: t.p.northover, rengolin, mcrosier, jmolloy Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D17000 llvm-svn: 260689
81 lines
2.7 KiB
LLVM
81 lines
2.7 KiB
LLVM
; RUN: llc -mtriple=arm64-apple-ios < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu < %s | FileCheck -check-prefix CHECK-NOTMACHO %s
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;
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; rdar://14075006
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define void @odd() nounwind {
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; CHECK-LABEL: odd:
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; CHECK: stp d15, d14, [sp, #-144]!
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; CHECK: stp d13, d12, [sp, #16]
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; CHECK: stp d11, d10, [sp, #32]
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; CHECK: stp d9, d8, [sp, #48]
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; CHECK: stp x28, x27, [sp, #64]
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; CHECK: stp x26, x25, [sp, #80]
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; CHECK: stp x24, x23, [sp, #96]
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; CHECK: stp x22, x21, [sp, #112]
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; CHECK: stp x20, x19, [sp, #128]
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; CHECK: movz x0, #0x2a
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; CHECK: ldp x20, x19, [sp, #128]
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; CHECK: ldp x22, x21, [sp, #112]
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; CHECK: ldp x24, x23, [sp, #96]
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; CHECK: ldp x26, x25, [sp, #80]
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; CHECK: ldp x28, x27, [sp, #64]
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; CHECK: ldp d9, d8, [sp, #48]
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; CHECK: ldp d11, d10, [sp, #32]
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; CHECK: ldp d13, d12, [sp, #16]
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; CHECK: ldp d15, d14, [sp], #144
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; CHECK-NOTMACHO-LABEL: odd:
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; CHECK-NOTMACHO: stp d14, d12, [sp, #-80]!
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; CHECK-NOTMACHO: stp d10, d8, [sp, #16]
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; CHECK-NOTMACHO: str x27, [sp, #32]
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; CHECK-NOTMACHO: stp x25, x23, [sp, #48]
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; CHECK-NOTMACHO: stp x21, x19, [sp, #64]
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; CHECK-NOTMACHO: movz x0, #0x2a
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; CHECK-NOTMACHO: ldp x21, x19, [sp, #64]
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; CHECK-NOTMACHO: ldp x25, x23, [sp, #48]
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; CHECK-NOTMACHO: ldr x27, [sp, #32]
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; CHECK-NOTMACHO: ldp d10, d8, [sp, #16]
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; CHECK-NOTMACHO: ldp d14, d12, [sp], #80
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call void asm sideeffect "mov x0, #42", "~{x0},~{x19},~{x21},~{x23},~{x25},~{x27},~{d8},~{d10},~{d12},~{d14}"() nounwind
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ret void
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}
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define void @even() nounwind {
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; CHECK-LABEL: even:
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; CHECK: stp d15, d14, [sp, #-144]!
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; CHECK: stp d13, d12, [sp, #16]
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; CHECK: stp d11, d10, [sp, #32]
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; CHECK: stp d9, d8, [sp, #48]
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; CHECK: stp x28, x27, [sp, #64]
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; CHECK: stp x26, x25, [sp, #80]
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; CHECK: stp x24, x23, [sp, #96]
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; CHECK: stp x22, x21, [sp, #112]
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; CHECK: stp x20, x19, [sp, #128]
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; CHECK: movz x0, #0x2a
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; CHECK: ldp x20, x19, [sp, #128]
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; CHECK: ldp x22, x21, [sp, #112]
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; CHECK: ldp x24, x23, [sp, #96]
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; CHECK: ldp x26, x25, [sp, #80]
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; CHECK: ldp x28, x27, [sp, #64]
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; CHECK: ldp d9, d8, [sp, #48]
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; CHECK: ldp d11, d10, [sp, #32]
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; CHECK: ldp d13, d12, [sp, #16]
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; CHECK: ldp d15, d14, [sp], #144
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; CHECK-NOTMACHO-LABEL: even:
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; CHECK-NOTMACHO: stp d15, d13, [sp, #-80]!
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; CHECK-NOTMACHO: stp d11, d9, [sp, #16]
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; CHECK-NOTMACHO: str x28, [sp, #32]
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; CHECK-NOTMACHO: stp x26, x24, [sp, #48]
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; CHECK-NOTMACHO: stp x22, x20, [sp, #64]
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; CHECK-NOTMACHO: movz x0, #0x2a
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; CHECK-NOTMACHO: ldp x22, x20, [sp, #64]
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; CHECK-NOTMACHO: ldp x26, x24, [sp, #48]
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; CHECK-NOTMACHO: ldr x28, [sp, #32]
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; CHECK-NOTMACHO: ldp d11, d9, [sp, #16]
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; CHECK-NOTMACHO: ldp d15, d13, [sp], #80
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call void asm sideeffect "mov x0, #42", "~{x0},~{x20},~{x22},~{x24},~{x26},~{x28},~{d9},~{d11},~{d13},~{d15}"() nounwind
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ret void
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}
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