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llvm-mirror/test/MC/RISCV/tail-call.s
Alex Bradbury 210286e009 [RISCV] Support assembling @plt symbol operands
This patch allows symbols appended with @plt to parse and assemble with the
R_RISCV_CALL_PLT relocation.

Differential Revision: https://reviews.llvm.org/D55335
Patch by Lewis Revill.

llvm-svn: 357470
2019-04-02 12:47:20 +00:00

54 lines
1.5 KiB
ArmAsm

# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
# RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
# RUN: llvm-mc -triple riscv32 < %s -show-encoding \
# RUN: | FileCheck -check-prefix=FIXUP %s
# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
# RUN: | llvm-objdump -d - | FileCheck -check-prefix=INSTR %s
# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELOC %s
# RUN: llvm-mc -triple riscv64 < %s -show-encoding \
# RUN: | FileCheck -check-prefix=FIXUP %s
.long foo
tail foo
# RELOC: R_RISCV_CALL foo 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: foo, kind:
tail bar
# RELOC: R_RISCV_CALL bar 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: bar, kind:
# Ensure that tail calls to functions whose names coincide with register names
# work.
tail zero
# RELOC: R_RISCV_CALL zero 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: zero, kind:
tail f1
# RELOC: R_RISCV_CALL f1 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: f1, kind:
tail ra
# RELOC: R_RISCV_CALL ra 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: ra, kind:
tail foo@plt
# RELOC: R_RISCV_CALL_PLT foo 0x0
# INSTR: auipc t1, 0
# INSTR: jr t1
# FIXUP: fixup A - offset: 0, value: foo@plt, kind: