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Craig Topper 0854c5aef5 [X86] Use SHLD with both inputs from the same register to implement rotate on Sandy Bridge and later Intel CPUs
Summary:
Sandy Bridge and later CPUs have better throughput using a SHLD to implement rotate versus the normal rotate instructions. Additionally it saves one uop and avoids a partial flag update dependency.

This patch implements this change on any Sandy Bridge or later processor without BMI2 instructions. With BMI2 we will use RORX as we currently do.

Reviewers: zvi

Reviewed By: zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30181

llvm-svn: 295697
2017-02-21 06:39:13 +00:00
2017-02-17 08:26:11 +00:00
2017-02-21 01:27:33 +00:00
2014-03-02 13:08:46 +00:00
2016-01-26 21:29:08 +00:00
2017-02-06 19:40:56 +00:00
2017-01-12 18:02:42 +00:00
2017-02-03 10:56:57 +00:00

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