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llvm-mirror/test/CodeGen/Mips/llvm-ir/abs.ll
Aleksandar Beserminji 2bbbcf425f [mips] Support for +abs2008 attribute
Instruction abs.[ds] is not generating correct result when working
with NaNs for revisions prior mips32r6 and mips64r6.

To generate a sequence which always produce a correct result, but also
to allow user more control on how his code is compiled, attribute
+abs2008 is added, so user can choose legacy or 2008.

By default legacy mode is used on revisions prior R6. Mips32r6 and
mips64r6 use abs2008 mode by default.

Differential Revision: https://reviews.llvm.org/D35983

llvm-svn: 352370
2019-01-28 14:59:30 +00:00

31 lines
1.6 KiB
LLVM

; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s --check-prefix=MIPS32
; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+abs2008,+fp64 -asm-show-inst < %s | FileCheck %s --check-prefix=MIPS32FP64
; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+abs2008,+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MM
; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+abs2008,+micromips,+fp64 -asm-show-inst < %s | FileCheck %s --check-prefix=MMFP64
; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MMR6
define float @abs_s(float %a) {
; MIPS32: {{(ori|ins)}}
; MIPS32-NOT: abs.s
; MIPS32FP64: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S
; MM: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM
; MMFP64: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM
; MMR6: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM
%ret = call float @llvm.fabs.f32(float %a)
ret float %ret
}
define double @abs_d(double %a) {
; MIPS32: {{(ori|ins|dsll)}}
; MIPS32-NOT: abs.d
; MIPS32FP64: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64
; MM: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D32_MM
; MMFP64: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64_MM
; MMR6: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64_MM
%ret = call double @llvm.fabs.f64(double %a)
ret double %ret
}
declare float @llvm.fabs.f32(float %a)
declare double @llvm.fabs.f64(double %a)