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b4e5bc94a3
Gcc supports target armv7ve which is armv7-a with virtualization extensions. This change adds support for this in llvm for gcc compatibility. Also remove redundant FeatureHWDiv, FeatureHWDivARM for a few models as this is specified automatically by FeatureVirtualization. Patch by Manoj Gupta. Differential Revision: https://reviews.llvm.org/D29472 llvm-svn: 294661
107 lines
2.9 KiB
LLVM
107 lines
2.9 KiB
LLVM
; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8 | \
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; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
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; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=swift | \
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; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
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; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4 | \
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; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
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; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r4f | \
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; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SWDIV
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; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-r5 | \
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; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
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; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 | \
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; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-EABI
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; RUN: llc < %s -mtriple=armv7ve-none-linux-gnu | \
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; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV
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; RUN: llc < %s -mtriple=thumbv7ve-none-linux-gnu | \
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; RUN: FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-HWDIV \
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; RUN: -check-prefix=CHECK-THUMB
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define i32 @f1(i32 %a, i32 %b) {
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entry:
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; CHECK-LABEL: f1
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; CHECK-SWDIV: __divsi3
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; CHECK-THUMB: .thumb_func
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; CHECK-HWDIV: sdiv
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; CHECK-EABI: __aeabi_idiv
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%tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f2(i32 %a, i32 %b) {
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entry:
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; CHECK-LABEL: f2
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; CHECK-SWDIV: __udivsi3
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; CHECK-THUMB: .thumb_func
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; CHECK-HWDIV: udiv
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; CHECK-EABI: __aeabi_uidiv
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%tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f3(i32 %a, i32 %b) {
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entry:
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; CHECK-LABEL: f3
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; CHECK-SWDIV: __modsi3
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; CHECK-THUMB: .thumb_func
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; CHECK-HWDIV: sdiv
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; CHECK-HWDIV: mls
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; EABI MODE = Remainder in R1, quotient in R0
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; CHECK-EABI: __aeabi_idivmod
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; CHECK-EABI-NEXT: mov r0, r1
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%tmp1 = srem i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i32 @f4(i32 %a, i32 %b) {
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entry:
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; CHECK-LABEL: f4
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; CHECK-SWDIV: __umodsi3
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; CHECK-THUMB: .thumb_func
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; CHECK-HWDIV: udiv
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; CHECK-HWDIV: mls
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; EABI MODE = Remainder in R1, quotient in R0
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; CHECK-EABI: __aeabi_uidivmod
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; CHECK-EABI-NEXT: mov r0, r1
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%tmp1 = urem i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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define i64 @f5(i64 %a, i64 %b) {
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entry:
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; CHECK-LABEL: f5
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; CHECK-SWDIV: __moddi3
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; CHECK-HWDIV: __moddi3
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; EABI MODE = Remainder in R2-R3, quotient in R0-R1
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; CHECK-EABI: __aeabi_ldivmod
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; CHECK-EABI-NEXT: mov r0, r2
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; CHECK-EABI-NEXT: mov r1, r3
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%tmp1 = srem i64 %a, %b ; <i64> [#uses=1]
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ret i64 %tmp1
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}
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define i64 @f6(i64 %a, i64 %b) {
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entry:
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; CHECK-LABEL: f6
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; CHECK-SWDIV: __umoddi3
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; CHECK-HWDIV: __umoddi3
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; EABI MODE = Remainder in R2-R3, quotient in R0-R1
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; CHECK-EABI: __aeabi_uldivmod
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; CHECK-EABI-NEXT: mov r0, r2
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; CHECK-EABI-NEXT: mov r1, r3
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%tmp1 = urem i64 %a, %b ; <i64> [#uses=1]
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ret i64 %tmp1
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}
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