1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen/ARM/iabs.ll
Saleem Abdulrasool 53e8c5a4af ARM: fixup more tests to specify the target more explicitly
This changes the tests that were targeting ARM EABI to explicitly specify the
environment rather than relying on the default.  This breaks with the new
Windows on ARM support when running the tests on Windows where the default
environment is no longer EABI.

Take the opportunity to avoid a pointless redirect (helps when trying to debug
with providing a command line invocation which can be copy and pasted) and
removing a few greps in favour of FileCheck.

llvm-svn: 205541
2014-04-03 16:01:44 +00:00

35 lines
790 B
LLVM

; RUN: llc -mtriple=arm-eabi -mattr=+v4t %s -o - | FileCheck %s
;; Integer absolute value, should produce something as good as: ARM:
;; movs r0, r0
;; rsbmi r0, r0, #0
;; bx lr
define i32 @test(i32 %a) {
%tmp1neg = sub i32 0, %a
%b = icmp sgt i32 %a, -1
%abs = select i1 %b, i32 %a, i32 %tmp1neg
ret i32 %abs
; CHECK: cmp
; CHECK: rsbmi r0, r0, #0
; CHECK: bx lr
}
; rdar://11633193
;; 3 instructions will be generated for abs(a-b):
;; subs
;; rsbmi
;; bx
define i32 @test2(i32 %a, i32 %b) nounwind readnone ssp {
entry:
; CHECK: test2
; CHECK: subs
; CHECK-NEXT: rsbmi
; CHECK-NEXT: bx
%sub = sub nsw i32 %a, %b
%cmp = icmp sgt i32 %sub, -1
%sub1 = sub nsw i32 0, %sub
%cond = select i1 %cmp, i32 %sub, i32 %sub1
ret i32 %cond
}