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llvm-mirror/test/CodeGen/ARM/pr34045-2.ll
Roger Ferrer Ibanez 9a8d6a6c92 [ARM] Use ADDCARRY / SUBCARRY
This is a preparatory step for D34515.

This change:
 - makes nodes ISD::ADDCARRY and ISD::SUBCARRY legal for i32
 - lowering is done by first converting the boolean value into the carry flag
   using (_, C) ← (ARMISD::ADDC R, -1) and converted back to an integer value
   using (R, _) ← (ARMISD::ADDE 0, 0, C). An ARMISD::ADDE between the two
   operations does the actual addition.
 - for subtraction, given that ISD::SUBCARRY second result is actually a
   borrow, we need to invert the value of the second operand and result before
   and after using ARMISD::SUBE. We need to invert the carry result of
   ARMISD::SUBE to preserve the semantics.
 - given that the generic combiner may lower ISD::ADDCARRY and
   ISD::SUBCARRYinto ISD::UADDO and ISD::USUBO we need to update their lowering
   as well otherwise i64 operations now would require branches. This implies
   updating the corresponding test for unsigned.
 - add new combiner to remove the redundant conversions from/to carry flags
   to/from boolean values (ARMISD::ADDC (ARMISD::ADDE 0, 0, C), -1) → C
 - fixes PR34045
 - fixes PR34564
 - fixes PR35103

Differential Revision: https://reviews.llvm.org/D35192

llvm-svn: 320355
2017-12-11 12:13:45 +00:00

26 lines
934 B
LLVM

; RUN: llc < %s -mtriple thumbv7 | FileCheck %s
define hidden void @foo(i32* %ptr, i1 zeroext %long_blocks) {
entry:
; This test is actually checking that no cycle is introduced but at least we
; want to see one umull.
; CHECK: umull
%0 = load i32, i32* %ptr, align 4
%conv.i.i13.i = zext i32 %0 to i64
%mul.i.i14.i = mul nuw nsw i64 %conv.i.i13.i, 18782
%1 = load i32, i32* undef, align 4
%conv4.i.i16.i = zext i32 %1 to i64
%add5.i.i17.i = add nuw nsw i64 %mul.i.i14.i, %conv4.i.i16.i
%shr.i.i18.i = lshr i64 %add5.i.i17.i, 32
%add10.i.i20.i = add nuw nsw i64 %shr.i.i18.i, %add5.i.i17.i
%conv11.i.i21.i = trunc i64 %add10.i.i20.i to i32
%x.0.neg.i.i26.i = sub i32 -2, %conv11.i.i21.i
%sub.i.i27.i = add i32 %x.0.neg.i.i26.i, 0
store i32 %sub.i.i27.i, i32* %ptr, align 4
br label %while.body.i
while.body.i: ; preds = %while.body.i, %entry
br label %while.body.i
}