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029d974b53
Summary:
Two utils methods have essentially the same functionality. This is an attempt to merge them into one.
1. lib/Transforms/Utils/Local.cpp : MergeBasicBlockIntoOnlyPred
2. lib/Transforms/Utils/BasicBlockUtils.cpp : MergeBlockIntoPredecessor
Prior to the patch:
1. MergeBasicBlockIntoOnlyPred
Updates either DomTree or DeferredDominance
Moves all instructions from Pred to BB, deletes Pred
Asserts BB has single predecessor
If address was taken, replace the block address with constant 1 (?)
2. MergeBlockIntoPredecessor
Updates DomTree, LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
After the patch:
Method 2. MergeBlockIntoPredecessor is attempting to become the new default:
Updates DomTree or DeferredDominance, and LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
Uses of MergeBasicBlockIntoOnlyPred that need to be replaced:
1. lib/Transforms/Scalar/LoopSimplifyCFG.cpp
Updated in this patch. No challenges.
2. lib/CodeGen/CodeGenPrepare.cpp
Updated in this patch.
i. eliminateFallThrough is straightforward, but I added using a temporary array to avoid the iterator invalidation.
ii. eliminateMostlyEmptyBlock(s) methods also now use a temporary array for blocks
Some interesting aspects:
- Since Pred is not deleted (BB is), the entry block does not need updating.
- The entry block was being updated with the deleted block in eliminateMostlyEmptyBlock. Added assert to make obvious that BB=SinglePred.
- isMergingEmptyBlockProfitable assumes BB is the one to be deleted.
- eliminateMostlyEmptyBlock(BB) does not delete BB on one path, it deletes its unique predecessor instead.
- adding some test owner as subscribers for the interesting tests modified:
test/CodeGen/X86/avx-cmp.ll
test/CodeGen/AMDGPU/nested-loop-conditions.ll
test/CodeGen/AMDGPU/si-annotate-cf.ll
test/CodeGen/X86/hoist-spill.ll
test/CodeGen/X86/2006-11-17-IllegalMove.ll
3. lib/Transforms/Scalar/JumpThreading.cpp
Not covered in this patch. It is the only use case using the DeferredDominance.
I would defer to Brian Rzycki to make this replacement.
Reviewers: chandlerc, spatel, davide, brzycki, bkramer, javed.absar
Subscribers: qcolombet, sanjoy, nemanjai, nhaehnle, jlebar, tpr, kbarton, RKSimon, wmi, arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D48202
llvm-svn: 335183
52 lines
2.2 KiB
LLVM
52 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr8 \
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; RUN: -ppc-convert-rr-to-ri -verify-machineinstrs | FileCheck %s
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define void @test(i32 zeroext %parts) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmplwi 0, 3, 1
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; CHECK-NEXT: bnelr+ 0
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; CHECK-NEXT: # %bb.1: # %test2.exit.us.unr-lcssa
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; CHECK-NEXT: ld 3, 0(3)
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; CHECK-NEXT: std 3, 0(3)
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entry:
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br label %cond.end.i
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cond.end.i: ; preds = %entry
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%cmp18.i = icmp eq i32 %parts, 1
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br i1 %cmp18.i, label %while.body.lr.ph.i.us.preheader, label %test3.exit.split
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while.body.lr.ph.i.us.preheader: ; preds = %cond.end.i
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%0 = icmp eq i32 %parts, 1
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br label %for.body.i62.us.preheader
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for.body.i62.us.preheader: ; preds = %while.body.lr.ph.i.us.preheader
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br i1 %0, label %test2.exit.us.unr-lcssa, label %for.body.i62.us.preheader.new
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for.body.i62.us.preheader.new: ; preds = %for.body.i62.us.preheader
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br label %for.body.i62.us
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for.body.i62.us: ; preds = %if.end.i.us.1, %for.body.i62.us.preheader.new
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%niter = phi i64 [ undef, %for.body.i62.us.preheader.new ], [ %niter.nsub.1, %if.end.i.us.1 ]
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%cmp8.i.us.1 = icmp uge i64 undef, 0
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br label %if.end.i.us.1
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test2.exit.us.unr-lcssa: ; preds = %if.end.i.us.1, %for.body.i62.us.preheader
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%c.addr.036.i.us.unr = phi i64 [ 0, %for.body.i62.us.preheader ], [ %c.addr.1.i.us.1, %if.end.i.us.1 ]
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%1 = load i64, i64* undef, align 8
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%tobool.i61.us.epil = icmp eq i64 %c.addr.036.i.us.unr, 0
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%add.neg.i.us.epil.pn = select i1 %tobool.i61.us.epil, i64 %1, i64 0
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%storemerge269 = sub i64 %add.neg.i.us.epil.pn, 0
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store i64 %storemerge269, i64* undef, align 8
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unreachable
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test3.exit.split: ; preds = %cond.end.i
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ret void
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if.end.i.us.1: ; preds = %for.body.i62.us
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%c.addr.1.i.us.1 = zext i1 %cmp8.i.us.1 to i64
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%niter.nsub.1 = add i64 %niter, -2
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%niter.ncmp.1 = icmp eq i64 %niter.nsub.1, 0
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br i1 %niter.ncmp.1, label %test2.exit.us.unr-lcssa, label %for.body.i62.us
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}
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