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llvm-mirror/test/MC/AArch64/armv8.5a-rand.s
Oliver Stannard d597eb64ea [AArch64][v8.5A] Add Armv8.5-A random number instructions
This adds two new system registers, used to generate random numbers.

This is an optional extension to v8.5-A, and will be controlled by the
"+rng" modifier of the -march= and -mcpu= options.

Patch by Pablo Barrio!

Differential revision: https://reviews.llvm.org/D52481

llvm-svn: 343217
2018-09-27 14:01:40 +00:00

15 lines
605 B
ArmAsm

// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+rand < %s | FileCheck %s
// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+v8.5a < %s 2>&1 | FileCheck %s --check-prefix=NORAND
// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-rand < %s 2>&1 | FileCheck %s --check-prefix=NORAND
mrs x0, rndr
mrs x1, rndrrs
// CHECK: mrs x0, RNDR // encoding: [0x00,0x24,0x3b,0xd5]
// CHECK: mrs x1, RNDRRS // encoding: [0x21,0x24,0x3b,0xd5]
// NORAND: expected readable system register
// NORAND-NEXT: rndr
// NORAND: expected readable system register
// NORAND-NEXT: rndrrs