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849b3a7299
According to the SystemZ ABI, 128-bit integer types should be passed and returned via implicit reference. However, this is not currently implemented at the LLVM IR level for the i128 type. This does not matter when compiling C/C++ code, since clang will implement the implicit reference itself. However, it turns out that when calling libgcc helper routines operating on 128-bit integers, LLVM will use i128 argument and return value types; the resulting code is not compatible with the ABI used in libgcc, leading to crashes (see PR26559). This should be simple to fix, except that i128 currently is not even a legal type for the SystemZ back end. Therefore, common code will already split arguments and return values into multiple parts. The bulk of this patch therefore consists of detecting such parts, and correctly handling passing via implicit reference of a value split into multiple parts. If at some time in the future, i128 becomes a legal type, this code can be removed again. This fixes PR26559. llvm-svn: 261325
131 lines
4.6 KiB
C++
131 lines
4.6 KiB
C++
//===-- SystemZCallingConv.h - Calling conventions for SystemZ --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZCALLINGCONV_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZCALLINGCONV_H
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/MC/MCRegisterInfo.h"
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namespace llvm {
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namespace SystemZ {
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const unsigned NumArgGPRs = 5;
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extern const MCPhysReg ArgGPRs[NumArgGPRs];
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const unsigned NumArgFPRs = 4;
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extern const MCPhysReg ArgFPRs[NumArgFPRs];
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} // end namespace SystemZ
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class SystemZCCState : public CCState {
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private:
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/// Records whether the value was a fixed argument.
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/// See ISD::OutputArg::IsFixed.
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SmallVector<bool, 4> ArgIsFixed;
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/// Records whether the value was widened from a short vector type.
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SmallVector<bool, 4> ArgIsShortVector;
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// Check whether ArgVT is a short vector type.
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bool IsShortVectorType(EVT ArgVT) {
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return ArgVT.isVector() && ArgVT.getStoreSize() <= 8;
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}
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public:
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SystemZCCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
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SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
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: CCState(CC, isVarArg, MF, locs, C) {}
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void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
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CCAssignFn Fn) {
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// Formal arguments are always fixed.
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ArgIsFixed.clear();
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for (unsigned i = 0; i < Ins.size(); ++i)
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ArgIsFixed.push_back(true);
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// Record whether the call operand was a short vector.
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ArgIsShortVector.clear();
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for (unsigned i = 0; i < Ins.size(); ++i)
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ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT));
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CCState::AnalyzeFormalArguments(Ins, Fn);
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}
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void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
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CCAssignFn Fn) {
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// Record whether the call operand was a fixed argument.
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ArgIsFixed.clear();
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for (unsigned i = 0; i < Outs.size(); ++i)
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ArgIsFixed.push_back(Outs[i].IsFixed);
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// Record whether the call operand was a short vector.
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ArgIsShortVector.clear();
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for (unsigned i = 0; i < Outs.size(); ++i)
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ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT));
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CCState::AnalyzeCallOperands(Outs, Fn);
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}
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// This version of AnalyzeCallOperands in the base class is not usable
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// since we must provide a means of accessing ISD::OutputArg::IsFixed.
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void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
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SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
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CCAssignFn Fn) = delete;
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bool IsFixed(unsigned ValNo) { return ArgIsFixed[ValNo]; }
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bool IsShortVector(unsigned ValNo) { return ArgIsShortVector[ValNo]; }
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};
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// Handle i128 argument types. These need to be passed by implicit
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// reference. This could be as simple as the following .td line:
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// CCIfType<[i128], CCPassIndirect<i64>>,
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// except that i128 is not a legal type, and therefore gets split by
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// common code into a pair of i64 arguments.
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inline bool CC_SystemZ_I128Indirect(unsigned &ValNo, MVT &ValVT,
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MVT &LocVT,
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CCValAssign::LocInfo &LocInfo,
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ISD::ArgFlagsTy &ArgFlags,
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CCState &State) {
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SmallVectorImpl<CCValAssign> &PendingMembers = State.getPendingLocs();
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// ArgFlags.isSplit() is true on the first part of a i128 argument;
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// PendingMembers.empty() is false on all subsequent parts.
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if (!ArgFlags.isSplit() && PendingMembers.empty())
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return false;
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// Push a pending Indirect value location for each part.
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LocVT = MVT::i64;
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LocInfo = CCValAssign::Indirect;
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PendingMembers.push_back(CCValAssign::getPending(ValNo, ValVT,
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LocVT, LocInfo));
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if (!ArgFlags.isSplitEnd())
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return true;
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// OK, we've collected all parts in the pending list. Allocate
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// the location (register or stack slot) for the indirect pointer.
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// (This duplicates the usual i64 calling convention rules.)
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unsigned Reg = State.AllocateReg(SystemZ::ArgGPRs);
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unsigned Offset = Reg ? 0 : State.AllocateStack(8, 8);
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// Use that same location for all the pending parts.
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for (auto &It : PendingMembers) {
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if (Reg)
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It.convertToReg(Reg);
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else
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It.convertToMem(Offset);
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State.addLoc(It);
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}
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PendingMembers.clear();
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return true;
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}
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} // end namespace llvm
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#endif
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