Michael Kuperstein 2c81cfa081 [DAG] Correctly chain masked loads ... If a masked loads is not added to the chain, it should not reset the chain's root. This fixes the remaining part of PR28515. llvm-svn: 275340		2016-07-13 23:23:40 +00:00
..
AArch64	[MIR] Print on the given output instead of stderr.	2016-07-13 20:36:03 +00:00
AMDGPU	[MIR] Print on the given output instead of stderr.	2016-07-13 20:36:03 +00:00
ARM	[MIR] Print on the given output instead of stderr.	2016-07-13 20:36:03 +00:00
BPF
Generic	Move mempcpy_call.ll to X86 subdirectory	2016-07-13 18:28:45 +00:00
Hexagon
Inputs
Lanai	[lanai] Use peephole optimizer to generate more conditional ALU operations.	2016-07-07 23:36:04 +00:00
Mips	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
MIR	[MIR] Fix one GlobalISel test case that I missed in r275314.	2016-07-13 22:35:33 +00:00
MSP430
NVPTX	NVPTX: Remove the legacy ptx intrinsics	2016-07-07 16:40:17 +00:00
PowerPC	[MIR] Print on the given output instead of stderr.	2016-07-13 20:36:03 +00:00
SPARC	VirtRegMap: Replace some identity copies with KILL instructions.	2016-07-09 00:19:07 +00:00
SystemZ	[SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunities	2016-07-11 18:45:03 +00:00
Thumb	[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)	2016-07-05 12:37:13 +00:00
Thumb2	[Thumb] Reapply r272251 with a fix for PR28348 (mk 2)	2016-07-05 12:37:13 +00:00
WebAssembly
WinEH	revert http://reviews.llvm.org/D21101	2016-06-30 17:52:24 +00:00
X86	[DAG] Correctly chain masked loads	2016-07-13 23:23:40 +00:00
XCore