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f649540f83
target cannot be determined accurately. This is the case for NaCl where the sandboxing instructions are added in MC layer, after the MipsLongBranch pass. It is also the case when the code has inline assembly. Instead of calculating offset in the MipsLongBranch pass, use %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions that are resolved during the fixup. This patch also deletes microMIPS test file test/CodeGen/Mips/micromips-long-branch.ll and implements microMIPS CHECKs in a much simpler way in a file test/CodeGen/Mips/longbranch.ll, together with MIPS32 and MIPS64. llvm-svn: 207656
241 lines
8.8 KiB
C++
241 lines
8.8 KiB
C++
//===-- MipsMCInstLower.cpp - Convert Mips MachineInstr to MCInst ---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains code to lower Mips MachineInstrs to their corresponding
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// MCInst records.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsMCInstLower.h"
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "MipsAsmPrinter.h"
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#include "MipsInstrInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/IR/Mangler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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using namespace llvm;
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MipsMCInstLower::MipsMCInstLower(MipsAsmPrinter &asmprinter)
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: AsmPrinter(asmprinter) {}
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void MipsMCInstLower::Initialize(MCContext *C) {
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Ctx = C;
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}
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MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
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MachineOperandType MOTy,
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unsigned Offset) const {
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MCSymbolRefExpr::VariantKind Kind;
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const MCSymbol *Symbol;
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switch(MO.getTargetFlags()) {
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default: llvm_unreachable("Invalid target flag!");
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case MipsII::MO_NO_FLAG: Kind = MCSymbolRefExpr::VK_None; break;
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case MipsII::MO_GPREL: Kind = MCSymbolRefExpr::VK_Mips_GPREL; break;
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case MipsII::MO_GOT_CALL: Kind = MCSymbolRefExpr::VK_Mips_GOT_CALL; break;
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case MipsII::MO_GOT16: Kind = MCSymbolRefExpr::VK_Mips_GOT16; break;
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case MipsII::MO_GOT: Kind = MCSymbolRefExpr::VK_Mips_GOT; break;
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case MipsII::MO_ABS_HI: Kind = MCSymbolRefExpr::VK_Mips_ABS_HI; break;
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case MipsII::MO_ABS_LO: Kind = MCSymbolRefExpr::VK_Mips_ABS_LO; break;
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case MipsII::MO_TLSGD: Kind = MCSymbolRefExpr::VK_Mips_TLSGD; break;
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case MipsII::MO_TLSLDM: Kind = MCSymbolRefExpr::VK_Mips_TLSLDM; break;
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case MipsII::MO_DTPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_HI; break;
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case MipsII::MO_DTPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_LO; break;
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case MipsII::MO_GOTTPREL: Kind = MCSymbolRefExpr::VK_Mips_GOTTPREL; break;
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case MipsII::MO_TPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_TPREL_HI; break;
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case MipsII::MO_TPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_TPREL_LO; break;
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case MipsII::MO_GPOFF_HI: Kind = MCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
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case MipsII::MO_GPOFF_LO: Kind = MCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
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case MipsII::MO_GOT_DISP: Kind = MCSymbolRefExpr::VK_Mips_GOT_DISP; break;
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case MipsII::MO_GOT_PAGE: Kind = MCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
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case MipsII::MO_GOT_OFST: Kind = MCSymbolRefExpr::VK_Mips_GOT_OFST; break;
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case MipsII::MO_HIGHER: Kind = MCSymbolRefExpr::VK_Mips_HIGHER; break;
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case MipsII::MO_HIGHEST: Kind = MCSymbolRefExpr::VK_Mips_HIGHEST; break;
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case MipsII::MO_GOT_HI16: Kind = MCSymbolRefExpr::VK_Mips_GOT_HI16; break;
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case MipsII::MO_GOT_LO16: Kind = MCSymbolRefExpr::VK_Mips_GOT_LO16; break;
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case MipsII::MO_CALL_HI16: Kind = MCSymbolRefExpr::VK_Mips_CALL_HI16; break;
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case MipsII::MO_CALL_LO16: Kind = MCSymbolRefExpr::VK_Mips_CALL_LO16; break;
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}
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switch (MOTy) {
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case MachineOperand::MO_MachineBasicBlock:
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Symbol = MO.getMBB()->getSymbol();
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break;
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case MachineOperand::MO_GlobalAddress:
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Symbol = AsmPrinter.getSymbol(MO.getGlobal());
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Offset += MO.getOffset();
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break;
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case MachineOperand::MO_BlockAddress:
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Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
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Offset += MO.getOffset();
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break;
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case MachineOperand::MO_ExternalSymbol:
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Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
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Offset += MO.getOffset();
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break;
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case MachineOperand::MO_JumpTableIndex:
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Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
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Offset += MO.getOffset();
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break;
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default:
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llvm_unreachable("<unknown operand type>");
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}
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const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol, Kind, *Ctx);
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if (!Offset)
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return MCOperand::CreateExpr(MCSym);
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// Assume offset is never negative.
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assert(Offset > 0);
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const MCConstantExpr *OffsetExpr = MCConstantExpr::Create(Offset, *Ctx);
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const MCBinaryExpr *Add = MCBinaryExpr::CreateAdd(MCSym, OffsetExpr, *Ctx);
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return MCOperand::CreateExpr(Add);
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}
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/*
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static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand &Opnd0,
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const MCOperand &Opnd1,
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const MCOperand &Opnd2 = MCOperand()) {
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Inst.setOpcode(Opc);
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Inst.addOperand(Opnd0);
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Inst.addOperand(Opnd1);
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if (Opnd2.isValid())
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Inst.addOperand(Opnd2);
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}
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*/
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MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO,
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unsigned offset) const {
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MachineOperandType MOTy = MO.getType();
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switch (MOTy) {
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default: llvm_unreachable("unknown operand type");
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case MachineOperand::MO_Register:
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// Ignore all implicit register operands.
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if (MO.isImplicit()) break;
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return MCOperand::CreateReg(MO.getReg());
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case MachineOperand::MO_Immediate:
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return MCOperand::CreateImm(MO.getImm() + offset);
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_GlobalAddress:
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case MachineOperand::MO_ExternalSymbol:
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case MachineOperand::MO_JumpTableIndex:
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case MachineOperand::MO_ConstantPoolIndex:
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case MachineOperand::MO_BlockAddress:
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return LowerSymbolOperand(MO, MOTy, offset);
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case MachineOperand::MO_RegisterMask:
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break;
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}
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return MCOperand();
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}
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MCOperand MipsMCInstLower::createSub(MachineBasicBlock *BB1,
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MachineBasicBlock *BB2,
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MCSymbolRefExpr::VariantKind Kind) const {
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const MCSymbolRefExpr *Sym1 = MCSymbolRefExpr::Create(BB1->getSymbol(), *Ctx);
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const MCSymbolRefExpr *Sym2 = MCSymbolRefExpr::Create(BB2->getSymbol(), *Ctx);
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const MCBinaryExpr *Sub = MCBinaryExpr::CreateSub(Sym1, Sym2, *Ctx);
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return MCOperand::CreateExpr(MipsMCExpr::Create(Kind, Sub, *Ctx));
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}
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void MipsMCInstLower::
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lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI, int Opcode,
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MCSymbolRefExpr::VariantKind Kind) const {
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OutMI.setOpcode(Opcode);
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// Lower register operand.
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OutMI.addOperand(LowerOperand(MI->getOperand(0)));
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// Create %hi($tgt-$baltgt) or %highest($tgt-$baltgt).
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OutMI.addOperand(createSub(MI->getOperand(1).getMBB(),
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MI->getOperand(2).getMBB(), Kind));
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}
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void MipsMCInstLower::
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lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI, int Opcode,
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MCSymbolRefExpr::VariantKind Kind) const {
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OutMI.setOpcode(Opcode);
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// Lower two register operands.
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for (unsigned I = 0, E = 2; I != E; ++I) {
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const MachineOperand &MO = MI->getOperand(I);
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OutMI.addOperand(LowerOperand(MO));
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}
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// Create %lo($tgt-$baltgt), %hi($tgt-$baltgt) or %higher($tgt-$baltgt).
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OutMI.addOperand(createSub(MI->getOperand(2).getMBB(),
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MI->getOperand(3).getMBB(), Kind));
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}
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bool MipsMCInstLower::lowerLongBranch(const MachineInstr *MI,
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MCInst &OutMI) const {
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switch (MI->getOpcode()) {
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default:
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return false;
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case Mips::LONG_BRANCH_LUi:
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lowerLongBranchLUi(MI, OutMI, Mips::LUi, MCSymbolRefExpr::VK_Mips_ABS_HI);
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return true;
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case Mips::LONG_BRANCH_LUi64:
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lowerLongBranchLUi(MI, OutMI, Mips::LUi64,
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MCSymbolRefExpr::VK_Mips_HIGHEST);
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return true;
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case Mips::LONG_BRANCH_ADDiu:
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lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu,
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MCSymbolRefExpr::VK_Mips_ABS_LO);
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return true;
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case Mips::LONG_BRANCH_DADDiu:
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unsigned TargetFlags = MI->getOperand(2).getTargetFlags();
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if (TargetFlags == MipsII::MO_HIGHER)
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lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu,
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MCSymbolRefExpr::VK_Mips_HIGHER);
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else if (TargetFlags == MipsII::MO_ABS_HI)
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lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu,
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MCSymbolRefExpr::VK_Mips_ABS_HI);
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else if (TargetFlags == MipsII::MO_ABS_LO)
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lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu,
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MCSymbolRefExpr::VK_Mips_ABS_LO);
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else
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report_fatal_error("Unexpected flags for LONG_BRANCH_DADDiu");
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return true;
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}
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}
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void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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if (lowerLongBranch(MI, OutMI))
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return;
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OutMI.setOpcode(MI->getOpcode());
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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MCOperand MCOp = LowerOperand(MO);
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if (MCOp.isValid())
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OutMI.addOperand(MCOp);
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}
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}
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