Craig Topper f3f2380881 [ValueTypes] Rename MVT::getVectorNumElements() to MVT::getVectorMinNumElements(). Fix some misuses of getVectorNumElements() ... getVectorNumElements() returns a value for scalable vectors without any warning so it is effectively getVectorMinNumElements(). By renaming it and making getVectorNumElements() forward to it, we can insert a check for scalable vectors into getVectorNumElements() similar to EVT. I didn't do that in this patch because there are still more fixes needed, but I was able to temporarily do it and passed the RISCV lit tests with these changes. The changes to isPow2VectorType and getPow2VectorType are copied from EVT. The change to TypeInfer::EnforceSameNumElts reduces the size of AArch64's isel table. We're now considering SameNumElts to require the scalable property to match which removes some unneeded type checks. This was motivated by the bug I fixed yesterday in 80b9510806cf11c57f2dd87191d3989fc45defa8 Reviewed By: frasercrmck, sdesmalen Differential Revision: https://reviews.llvm.org/D102262		2021-05-12 07:46:45 -07:00
..
AsmParser
Disassembler
MCTargetDesc	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
TargetInfo
BitTracker.cpp
BitTracker.h
CMakeLists.txt	[Hexagon] Remove redundant HVX intrinsic selection patterns, NFC	2021-04-23 09:28:08 -05:00
Hexagon.h
Hexagon.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonArch.h
HexagonAsmPrinter.cpp
HexagonAsmPrinter.h
HexagonBitSimplify.cpp
HexagonBitTracker.cpp
HexagonBitTracker.h
HexagonBlockRanges.cpp
HexagonBlockRanges.h
HexagonBranchRelaxation.cpp
HexagonCallingConv.td
HexagonCFGOptimizer.cpp
HexagonCommonGEP.cpp
HexagonConstExtenders.cpp
HexagonConstPropagation.cpp
HexagonCopyToCombine.cpp
HexagonDepArch.h	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepArch.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepDecoders.inc	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepIICHVX.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepIICScalar.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepInstrFormats.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepInstrInfo.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepITypes.h	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepITypes.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepMapAsm2Intrin.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepMappings.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepMask.h	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepOperands.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonDepTimingClasses.h	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonEarlyIfConv.cpp
HexagonExpandCondsets.cpp
HexagonFixupHwLoops.cpp
HexagonFrameLowering.cpp	[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions	2021-03-30 17:31:39 +01:00
HexagonFrameLowering.h
HexagonGenExtract.cpp
HexagonGenInsert.cpp
HexagonGenMux.cpp
HexagonGenPredicate.cpp
HexagonHardwareLoops.cpp	[llvm] Use llvm::is_contained (NFC)	2021-02-14 08:36:20 -08:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td
HexagonInstrFormats.td
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td
HexagonInstrInfo.cpp	Retire TargetRegisterInfo::getSpillAlignment	2021-05-07 15:16:22 +02:00
HexagonInstrInfo.h
HexagonIntrinsics.td	[Hexagon] Remove redundant HVX intrinsic selection patterns, NFC	2021-04-23 09:28:08 -05:00
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td
HexagonISelDAGToDAG.cpp	[docs] Fix doxygen comments wrongly attached to the llvm namespace	2021-04-07 01:20:18 +02:00
HexagonISelDAGToDAG.h
HexagonISelDAGToDAGHVX.cpp
HexagonISelLowering.cpp	[ValueTypes] Rename MVT::getVectorNumElements() to MVT::getVectorMinNumElements(). Fix some misuses of getVectorNumElements()	2021-05-12 07:46:45 -07:00
HexagonISelLowering.h	[TargetLowering] move "o" and "X" constraint handling to base class	2021-04-19 10:53:31 -07:00
HexagonISelLoweringHVX.cpp	[Hexagon] Avoid infinite loops in type legalization when lowering SETCC	2021-04-15 13:34:37 -05:00
HexagonLoopIdiomRecognition.cpp
HexagonLoopIdiomRecognition.h
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp
HexagonOperands.td
HexagonOptAddrMode.cpp
HexagonOptimizeSZextends.cpp
HexagonPatterns.td	[Hexagon] Use 'vnot' instead of 'not' in patterns with vectors	2021-04-22 15:36:20 -05:00
HexagonPatternsHVX.td	[Hexagon] Use 'vnot' instead of 'not' in patterns with vectors	2021-04-22 15:36:20 -05:00
HexagonPatternsV65.td
HexagonPeephole.cpp
HexagonPseudo.td
HexagonRDFOpt.cpp
HexagonRegisterInfo.cpp	[Hexagon] Limit virtual register reuse range in FI elimination	2021-03-25 13:59:36 -05:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td
HexagonSchedule.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonScheduleV67.td
HexagonScheduleV67T.td
HexagonScheduleV68.td	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp
HexagonSplitDouble.cpp	[llvm] Use append_range (NFC)	2021-01-27 23:25:41 -08:00
HexagonStoreWidening.cpp	[NFC][AA] Prepare to convert AliasResult to class with PartialAlias offset.	2021-04-09 12:54:22 +03:00
HexagonSubtarget.cpp
HexagonSubtarget.h	[Hexagon] Add LLVM instruction definitions for Hexagon V68	2021-02-03 13:59:34 -06:00
HexagonTargetMachine.cpp	[NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose	2021-05-07 21:51:47 -07:00
HexagonTargetMachine.h	[NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose	2021-05-07 21:51:47 -07:00
HexagonTargetObjectFile.cpp
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp	[TTI] NFC: Change getTypeLegalizationCost to return InstructionCost.	2021-04-30 22:51:51 +03:00
HexagonTargetTransformInfo.h	[TTI] NFC: Change getScalarizationOverhead and getOperandsScalarizationOverhead to return InstructionCost.	2021-04-27 08:51:48 +03:00
HexagonVectorCombine.cpp	HexagonVectorCombine.cpp - don't negate a bool value. NFCI.	2021-05-10 10:50:37 +01:00
HexagonVectorLoopCarriedReuse.cpp
HexagonVectorLoopCarriedReuse.h
HexagonVectorPrint.cpp
HexagonVExtract.cpp
HexagonVLIWPacketizer.cpp
HexagonVLIWPacketizer.h
RDFCopy.cpp
RDFCopy.h
RDFDeadCode.cpp	[Target] Use llvm::append_range (NFC)	2021-01-24 12:18:56 -08:00
RDFDeadCode.h