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914a0dbba1
getting them out of the business of making stack slots. llvm-svn: 23180
78 lines
2.9 KiB
C++
78 lines
2.9 KiB
C++
//===-- PPC32ISelLowering.h - PPC32 DAG Lowering Interface ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Chris Lattner and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that PPC uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H
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#define LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "PowerPC.h"
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namespace llvm {
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namespace PPCISD {
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enum NodeType {
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// Start the numbering where the builting ops and target ops leave off.
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FIRST_NUMBER = ISD::BUILTIN_OP_END+PPC::INSTRUCTION_LIST_END,
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/// FSEL - Traditional three-operand fsel node.
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///
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FSEL,
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/// FCTIWZ - The FCTIWZ instruction, taking an f32 or f64 operand,
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/// producing an f64 value.
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FCTIWZ,
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};
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}
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class PPC32TargetLowering : public TargetLowering {
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int VarArgsFrameIndex; // FrameIndex for start of varargs area.
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int ReturnAddrIndex; // FrameIndex for return slot.
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public:
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PPC32TargetLowering(TargetMachine &TM);
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/// LowerOperation - Provide custom lowering hooks for some operations.
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///
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virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
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/// LowerArguments - This hook must be implemented to indicate how we should
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/// lower the arguments for the specified function, into the specified DAG.
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virtual std::vector<SDOperand>
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LowerArguments(Function &F, SelectionDAG &DAG);
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/// LowerCallTo - This hook lowers an abstract call to a function into an
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/// actual call.
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virtual std::pair<SDOperand, SDOperand>
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LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg,
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unsigned CC,
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bool isTailCall, SDOperand Callee, ArgListTy &Args,
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SelectionDAG &DAG);
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virtual SDOperand LowerVAStart(SDOperand Chain, SDOperand VAListP,
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Value *VAListV, SelectionDAG &DAG);
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virtual std::pair<SDOperand,SDOperand>
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LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV,
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const Type *ArgTy, SelectionDAG &DAG);
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virtual std::pair<SDOperand, SDOperand>
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LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
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SelectionDAG &DAG);
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virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
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MachineBasicBlock *MBB);
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};
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}
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#endif // LLVM_TARGET_POWERPC_PPC32ISELLOWERING_H
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