Jon Roelofs b3511ee3cf [GISel] Support llvm.memcpy.inline ... Differential revision: https://reviews.llvm.org/D105072		2021-06-30 12:39:05 -07:00
..
GlobalISel	[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX	2021-06-28 09:06:44 -04:00
CGPassBuilderOption.h	[llvm, clang] Remove stdlib includes from .h files without std::	2021-04-27 12:41:39 -04:00
CodeGenCWrappers.h
GenericOpcodes.td	[GISel] Support llvm.memcpy.inline	2021-06-30 12:39:05 -07:00
Target.td	[llvm][clang][fpenv] Create new intrinsic llvm.arith.fence to control FP optimization at expression level	2021-06-28 12:26:52 -04:00
TargetCallingConv.td	IR+AArch64: add a "swiftasync" argument attribute.	2021-05-14 11:43:58 +01:00
TargetInstrPredicate.td	[TableGen] Clean up Target .td include files	2020-11-17 09:45:14 -05:00
TargetIntrinsicInfo.h	TargetIntrinsicInfo.h - remove unnecessary Compiler.h include. NFC.	2020-05-19 09:28:13 +01:00
TargetItinerary.td	[TableGen] Clean up Target .td include files	2020-11-17 09:45:14 -05:00
TargetLoweringObjectFile.h	Basic block sections should enable function sections implicitly.	2021-02-16 16:27:16 -08:00
TargetMachine.h	[NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose	2021-05-07 21:51:47 -07:00
TargetOptions.h	[NFC] Update renamed option in comments	2021-06-15 19:44:31 +00:00
TargetPfmCounters.td	[TableGen] Clean up Target .td include files	2020-11-17 09:45:14 -05:00
TargetSchedule.td	[TableGen] Remove unneeded forward defs. NFC.	2021-05-14 12:36:20 +01:00
TargetSelectionDAG.td	[ISel] Port AArch64 SABD and UABD to DAGCombine	2021-06-26 19:34:16 +01:00