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f2011a3ae7
IMHO it is an antipattern to have a enum value that is Default. At any given piece of code it is not clear if we have to handle Default or if has already been mapped to a concrete value. In this case in particular, only the target can do the mapping and it is nice to make sure it is always done. This deletes the two default enum values of CodeModel and uses an explicit Optional<CodeModel> when it is possible that it is unspecified. llvm-svn: 309911
123 lines
4.0 KiB
C++
123 lines
4.0 KiB
C++
#include "AArch64Subtarget.h"
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#include "AArch64TargetMachine.h"
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#include "llvm/CodeGen/MIRParser/MIRParser.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace {
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std::unique_ptr<TargetMachine> createTargetMachine() {
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auto TT(Triple::normalize("aarch64--"));
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std::string CPU("generic");
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std::string FS("");
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LLVMInitializeAArch64TargetInfo();
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LLVMInitializeAArch64Target();
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LLVMInitializeAArch64TargetMC();
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std::string Error;
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const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
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return std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
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TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default));
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}
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std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
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AArch64Subtarget ST(TM->getTargetTriple(), TM->getTargetCPU(),
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TM->getTargetFeatureString(), *TM, /* isLittle */ false);
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return llvm::make_unique<AArch64InstrInfo>(ST);
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}
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/// The \p InputIRSnippet is only needed for things that can't be expressed in
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/// the \p InputMIRSnippet (global variables etc)
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/// TODO: Some of this might be useful for other architectures as well - extract
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/// the platform-independent parts somewhere they can be reused.
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void runChecks(
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TargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet,
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const StringRef InputMIRSnippet,
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std::function<void(AArch64InstrInfo &, MachineFunction &)> Checks) {
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LLVMContext Context;
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auto MIRString =
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"--- |\n"
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" declare void @sizes()\n"
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+ InputIRSnippet.str() +
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"...\n"
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"---\n"
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"name: sizes\n"
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"body: |\n"
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" bb.0:\n"
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+ InputMIRSnippet.str();
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std::unique_ptr<MemoryBuffer> MBuffer = MemoryBuffer::getMemBuffer(MIRString);
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std::unique_ptr<MIRParser> MParser =
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createMIRParser(std::move(MBuffer), Context);
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ASSERT_TRUE(MParser);
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std::unique_ptr<Module> M = MParser->parseIRModule();
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ASSERT_TRUE(M);
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M->setTargetTriple(TM->getTargetTriple().getTriple());
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M->setDataLayout(TM->createDataLayout());
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MachineModuleInfo MMI(TM);
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bool Res = MParser->parseMachineFunctions(*M, MMI);
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ASSERT_FALSE(Res);
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auto F = M->getFunction("sizes");
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ASSERT_TRUE(F != nullptr);
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auto &MF = MMI.getOrCreateMachineFunction(*F);
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Checks(*II, MF);
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}
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} // anonymous namespace
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TEST(InstSizes, STACKMAP) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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ASSERT_TRUE(TM);
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "", " STACKMAP 0, 16\n"
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" STACKMAP 1, 32\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(16u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(32u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, PATCHPOINT) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "",
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" PATCHPOINT 0, 16, 0, 0, 0, csr_aarch64_aapcs\n"
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" PATCHPOINT 1, 32, 0, 0, 0, csr_aarch64_aapcs\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(16u, II.getInstSizeInBytes(*I));
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++I;
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EXPECT_EQ(32u, II.getInstSizeInBytes(*I));
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});
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}
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TEST(InstSizes, TLSDESC_CALLSEQ) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(
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TM.get(), II.get(),
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" @ThreadLocalGlobal = external thread_local global i32, align 8\n",
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" TLSDESC_CALLSEQ target-flags(aarch64-tls) @ThreadLocalGlobal\n",
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[](AArch64InstrInfo &II, MachineFunction &MF) {
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auto I = MF.begin()->begin();
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EXPECT_EQ(16u, II.getInstSizeInBytes(*I));
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});
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}
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