mirror of
https://github.com/RPCS3/llvm-mirror.git
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ab043ff680
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
309 lines
11 KiB
LLVM
309 lines
11 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | FileCheck -check-prefix=X64 %s
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;; A basic sanity check to make sure that MMX arithmetic actually compiles.
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;; First is a straight translation of the original with bitcasts as needed.
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; X32-LABEL: test0
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; X64-LABEL: test0
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define void @test0(x86_mmx* %A, x86_mmx* %B) {
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entry:
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%tmp1 = load x86_mmx, x86_mmx* %A
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%tmp3 = load x86_mmx, x86_mmx* %B
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%tmp1a = bitcast x86_mmx %tmp1 to <8 x i8>
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%tmp3a = bitcast x86_mmx %tmp3 to <8 x i8>
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%tmp4 = add <8 x i8> %tmp1a, %tmp3a
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%tmp4a = bitcast <8 x i8> %tmp4 to x86_mmx
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store x86_mmx %tmp4a, x86_mmx* %A
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%tmp7 = load x86_mmx, x86_mmx* %B
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%tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.b(x86_mmx %tmp4a, x86_mmx %tmp7)
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store x86_mmx %tmp12, x86_mmx* %A
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%tmp16 = load x86_mmx, x86_mmx* %B
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%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b(x86_mmx %tmp12, x86_mmx %tmp16)
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store x86_mmx %tmp21, x86_mmx* %A
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%tmp27 = load x86_mmx, x86_mmx* %B
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%tmp21a = bitcast x86_mmx %tmp21 to <8 x i8>
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%tmp27a = bitcast x86_mmx %tmp27 to <8 x i8>
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%tmp28 = sub <8 x i8> %tmp21a, %tmp27a
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%tmp28a = bitcast <8 x i8> %tmp28 to x86_mmx
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store x86_mmx %tmp28a, x86_mmx* %A
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%tmp31 = load x86_mmx, x86_mmx* %B
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%tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %tmp28a, x86_mmx %tmp31)
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store x86_mmx %tmp36, x86_mmx* %A
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%tmp40 = load x86_mmx, x86_mmx* %B
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%tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx %tmp36, x86_mmx %tmp40)
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store x86_mmx %tmp45, x86_mmx* %A
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%tmp51 = load x86_mmx, x86_mmx* %B
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%tmp45a = bitcast x86_mmx %tmp45 to <8 x i8>
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%tmp51a = bitcast x86_mmx %tmp51 to <8 x i8>
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%tmp52 = mul <8 x i8> %tmp45a, %tmp51a
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%tmp52a = bitcast <8 x i8> %tmp52 to x86_mmx
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store x86_mmx %tmp52a, x86_mmx* %A
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%tmp57 = load x86_mmx, x86_mmx* %B
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%tmp57a = bitcast x86_mmx %tmp57 to <8 x i8>
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%tmp58 = and <8 x i8> %tmp52, %tmp57a
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%tmp58a = bitcast <8 x i8> %tmp58 to x86_mmx
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store x86_mmx %tmp58a, x86_mmx* %A
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%tmp63 = load x86_mmx, x86_mmx* %B
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%tmp63a = bitcast x86_mmx %tmp63 to <8 x i8>
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%tmp64 = or <8 x i8> %tmp58, %tmp63a
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%tmp64a = bitcast <8 x i8> %tmp64 to x86_mmx
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store x86_mmx %tmp64a, x86_mmx* %A
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%tmp69 = load x86_mmx, x86_mmx* %B
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%tmp69a = bitcast x86_mmx %tmp69 to <8 x i8>
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%tmp64b = bitcast x86_mmx %tmp64a to <8 x i8>
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%tmp70 = xor <8 x i8> %tmp64b, %tmp69a
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%tmp70a = bitcast <8 x i8> %tmp70 to x86_mmx
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store x86_mmx %tmp70a, x86_mmx* %A
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tail call void @llvm.x86.mmx.emms()
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ret void
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}
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; X32-LABEL: test1
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; X64-LABEL: test1
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define void @test1(x86_mmx* %A, x86_mmx* %B) {
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entry:
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%tmp1 = load x86_mmx, x86_mmx* %A
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%tmp3 = load x86_mmx, x86_mmx* %B
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%tmp1a = bitcast x86_mmx %tmp1 to <2 x i32>
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%tmp3a = bitcast x86_mmx %tmp3 to <2 x i32>
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%tmp4 = add <2 x i32> %tmp1a, %tmp3a
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%tmp4a = bitcast <2 x i32> %tmp4 to x86_mmx
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store x86_mmx %tmp4a, x86_mmx* %A
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%tmp9 = load x86_mmx, x86_mmx* %B
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%tmp9a = bitcast x86_mmx %tmp9 to <2 x i32>
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%tmp10 = sub <2 x i32> %tmp4, %tmp9a
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%tmp10a = bitcast <2 x i32> %tmp4 to x86_mmx
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store x86_mmx %tmp10a, x86_mmx* %A
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%tmp15 = load x86_mmx, x86_mmx* %B
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%tmp10b = bitcast x86_mmx %tmp10a to <2 x i32>
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%tmp15a = bitcast x86_mmx %tmp15 to <2 x i32>
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%tmp16 = mul <2 x i32> %tmp10b, %tmp15a
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%tmp16a = bitcast <2 x i32> %tmp16 to x86_mmx
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store x86_mmx %tmp16a, x86_mmx* %A
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%tmp21 = load x86_mmx, x86_mmx* %B
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%tmp16b = bitcast x86_mmx %tmp16a to <2 x i32>
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%tmp21a = bitcast x86_mmx %tmp21 to <2 x i32>
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%tmp22 = and <2 x i32> %tmp16b, %tmp21a
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%tmp22a = bitcast <2 x i32> %tmp22 to x86_mmx
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store x86_mmx %tmp22a, x86_mmx* %A
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%tmp27 = load x86_mmx, x86_mmx* %B
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%tmp22b = bitcast x86_mmx %tmp22a to <2 x i32>
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%tmp27a = bitcast x86_mmx %tmp27 to <2 x i32>
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%tmp28 = or <2 x i32> %tmp22b, %tmp27a
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%tmp28a = bitcast <2 x i32> %tmp28 to x86_mmx
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store x86_mmx %tmp28a, x86_mmx* %A
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%tmp33 = load x86_mmx, x86_mmx* %B
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%tmp28b = bitcast x86_mmx %tmp28a to <2 x i32>
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%tmp33a = bitcast x86_mmx %tmp33 to <2 x i32>
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%tmp34 = xor <2 x i32> %tmp28b, %tmp33a
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%tmp34a = bitcast <2 x i32> %tmp34 to x86_mmx
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store x86_mmx %tmp34a, x86_mmx* %A
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tail call void @llvm.x86.mmx.emms( )
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ret void
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}
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; X32-LABEL: test2
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; X64-LABEL: test2
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define void @test2(x86_mmx* %A, x86_mmx* %B) {
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entry:
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%tmp1 = load x86_mmx, x86_mmx* %A
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%tmp3 = load x86_mmx, x86_mmx* %B
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%tmp1a = bitcast x86_mmx %tmp1 to <4 x i16>
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%tmp3a = bitcast x86_mmx %tmp3 to <4 x i16>
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%tmp4 = add <4 x i16> %tmp1a, %tmp3a
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%tmp4a = bitcast <4 x i16> %tmp4 to x86_mmx
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store x86_mmx %tmp4a, x86_mmx* %A
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%tmp7 = load x86_mmx, x86_mmx* %B
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%tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.w(x86_mmx %tmp4a, x86_mmx %tmp7)
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store x86_mmx %tmp12, x86_mmx* %A
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%tmp16 = load x86_mmx, x86_mmx* %B
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%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx %tmp12, x86_mmx %tmp16)
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store x86_mmx %tmp21, x86_mmx* %A
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%tmp27 = load x86_mmx, x86_mmx* %B
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%tmp21a = bitcast x86_mmx %tmp21 to <4 x i16>
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%tmp27a = bitcast x86_mmx %tmp27 to <4 x i16>
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%tmp28 = sub <4 x i16> %tmp21a, %tmp27a
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%tmp28a = bitcast <4 x i16> %tmp28 to x86_mmx
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store x86_mmx %tmp28a, x86_mmx* %A
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%tmp31 = load x86_mmx, x86_mmx* %B
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%tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %tmp28a, x86_mmx %tmp31)
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store x86_mmx %tmp36, x86_mmx* %A
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%tmp40 = load x86_mmx, x86_mmx* %B
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%tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx %tmp36, x86_mmx %tmp40)
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store x86_mmx %tmp45, x86_mmx* %A
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%tmp51 = load x86_mmx, x86_mmx* %B
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%tmp45a = bitcast x86_mmx %tmp45 to <4 x i16>
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%tmp51a = bitcast x86_mmx %tmp51 to <4 x i16>
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%tmp52 = mul <4 x i16> %tmp45a, %tmp51a
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%tmp52a = bitcast <4 x i16> %tmp52 to x86_mmx
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store x86_mmx %tmp52a, x86_mmx* %A
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%tmp55 = load x86_mmx, x86_mmx* %B
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%tmp60 = tail call x86_mmx @llvm.x86.mmx.pmulh.w(x86_mmx %tmp52a, x86_mmx %tmp55)
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store x86_mmx %tmp60, x86_mmx* %A
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%tmp64 = load x86_mmx, x86_mmx* %B
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%tmp69 = tail call x86_mmx @llvm.x86.mmx.pmadd.wd(x86_mmx %tmp60, x86_mmx %tmp64)
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%tmp70 = bitcast x86_mmx %tmp69 to x86_mmx
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store x86_mmx %tmp70, x86_mmx* %A
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%tmp75 = load x86_mmx, x86_mmx* %B
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%tmp70a = bitcast x86_mmx %tmp70 to <4 x i16>
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%tmp75a = bitcast x86_mmx %tmp75 to <4 x i16>
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%tmp76 = and <4 x i16> %tmp70a, %tmp75a
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%tmp76a = bitcast <4 x i16> %tmp76 to x86_mmx
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store x86_mmx %tmp76a, x86_mmx* %A
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%tmp81 = load x86_mmx, x86_mmx* %B
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%tmp76b = bitcast x86_mmx %tmp76a to <4 x i16>
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%tmp81a = bitcast x86_mmx %tmp81 to <4 x i16>
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%tmp82 = or <4 x i16> %tmp76b, %tmp81a
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%tmp82a = bitcast <4 x i16> %tmp82 to x86_mmx
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store x86_mmx %tmp82a, x86_mmx* %A
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%tmp87 = load x86_mmx, x86_mmx* %B
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%tmp82b = bitcast x86_mmx %tmp82a to <4 x i16>
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%tmp87a = bitcast x86_mmx %tmp87 to <4 x i16>
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%tmp88 = xor <4 x i16> %tmp82b, %tmp87a
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%tmp88a = bitcast <4 x i16> %tmp88 to x86_mmx
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store x86_mmx %tmp88a, x86_mmx* %A
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tail call void @llvm.x86.mmx.emms( )
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ret void
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}
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; X32-LABEL: test3
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define <1 x i64> @test3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) nounwind {
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entry:
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%tmp2942 = icmp eq i32 %count, 0
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br i1 %tmp2942, label %bb31, label %bb26
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bb26:
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; X32: addl
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; X32: adcl
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%i.037.0 = phi i32 [ 0, %entry ], [ %tmp25, %bb26 ]
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%sum.035.0 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ]
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%tmp13 = getelementptr <1 x i64>, <1 x i64>* %b, i32 %i.037.0
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%tmp14 = load <1 x i64>, <1 x i64>* %tmp13
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%tmp18 = getelementptr <1 x i64>, <1 x i64>* %a, i32 %i.037.0
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%tmp19 = load <1 x i64>, <1 x i64>* %tmp18
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%tmp21 = add <1 x i64> %tmp19, %tmp14
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%tmp22 = add <1 x i64> %tmp21, %sum.035.0
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%tmp25 = add i32 %i.037.0, 1
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%tmp29 = icmp ult i32 %tmp25, %count
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br i1 %tmp29, label %bb26, label %bb31
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bb31:
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%sum.035.1 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ]
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ret <1 x i64> %sum.035.1
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}
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; There are no MMX operations here, so we use XMM or i64.
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; X64-LABEL: ti8
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define void @ti8(double %a, double %b) nounwind {
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entry:
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%tmp1 = bitcast double %a to <8 x i8>
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%tmp2 = bitcast double %b to <8 x i8>
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%tmp3 = add <8 x i8> %tmp1, %tmp2
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; X64: paddb
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store <8 x i8> %tmp3, <8 x i8>* null
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ret void
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}
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; X64-LABEL: ti16
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define void @ti16(double %a, double %b) nounwind {
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entry:
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%tmp1 = bitcast double %a to <4 x i16>
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%tmp2 = bitcast double %b to <4 x i16>
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%tmp3 = add <4 x i16> %tmp1, %tmp2
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; X64: paddw
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store <4 x i16> %tmp3, <4 x i16>* null
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ret void
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}
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; X64-LABEL: ti32
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define void @ti32(double %a, double %b) nounwind {
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entry:
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%tmp1 = bitcast double %a to <2 x i32>
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%tmp2 = bitcast double %b to <2 x i32>
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%tmp3 = add <2 x i32> %tmp1, %tmp2
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; X64: paddd
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store <2 x i32> %tmp3, <2 x i32>* null
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ret void
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}
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; X64-LABEL: ti64
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define void @ti64(double %a, double %b) nounwind {
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entry:
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%tmp1 = bitcast double %a to <1 x i64>
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%tmp2 = bitcast double %b to <1 x i64>
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%tmp3 = add <1 x i64> %tmp1, %tmp2
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; X64: addq
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store <1 x i64> %tmp3, <1 x i64>* null
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ret void
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}
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; MMX intrinsics calls get us MMX instructions.
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; X64-LABEL: ti8a
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define void @ti8a(double %a, double %b) nounwind {
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entry:
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%tmp1 = bitcast double %a to x86_mmx
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; X64: movdq2q
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%tmp2 = bitcast double %b to x86_mmx
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; X64: movdq2q
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%tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %tmp1, x86_mmx %tmp2)
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store x86_mmx %tmp3, x86_mmx* null
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ret void
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}
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; X64-LABEL: ti16a
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define void @ti16a(double %a, double %b) nounwind {
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entry:
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%tmp1 = bitcast double %a to x86_mmx
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; X64: movdq2q
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%tmp2 = bitcast double %b to x86_mmx
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; X64: movdq2q
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%tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %tmp1, x86_mmx %tmp2)
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store x86_mmx %tmp3, x86_mmx* null
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ret void
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}
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; X64-LABEL: ti32a
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define void @ti32a(double %a, double %b) nounwind {
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entry:
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%tmp1 = bitcast double %a to x86_mmx
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; X64: movdq2q
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%tmp2 = bitcast double %b to x86_mmx
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; X64: movdq2q
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%tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %tmp1, x86_mmx %tmp2)
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store x86_mmx %tmp3, x86_mmx* null
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ret void
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}
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; X64-LABEL: ti64a
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define void @ti64a(double %a, double %b) nounwind {
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entry:
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%tmp1 = bitcast double %a to x86_mmx
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; X64: movdq2q
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%tmp2 = bitcast double %b to x86_mmx
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; X64: movdq2q
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%tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %tmp1, x86_mmx %tmp2)
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store x86_mmx %tmp3, x86_mmx* null
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ret void
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}
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declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.paddus.b(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.pmulh.w(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.pmadd.wd(x86_mmx, x86_mmx)
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declare void @llvm.x86.mmx.emms()
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declare x86_mmx @llvm.x86.mmx.padds.b(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.padds.w(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx)
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declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx)
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