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llvm-mirror/test/DebugInfo/MIR/Mips
Djordje Todorovic cb2286ce42 [CSInfo][MIPS] Update CSInfo in delay slot filler
In MipsDelaySlotFiller, when replacing old call-branch with
the compact branch instruction, an assertion is caused by erasing
the old call with unhandled CSInfo.
The problem was reported in PR48695.
This patch fixes it, by moving call site info from the old call
instruction to its replace.
​
Patch by Nikola Tesic
​
Differential revision: https://reviews.llvm.org/D94685
2021-01-18 15:29:59 +01:00
..
call-site-info-update-delay-slot-filler.mir [CSInfo][MIPS] Update CSInfo in delay slot filler 2021-01-18 15:29:59 +01:00
dbg-call-site-copy-sub-reg.mir [CSInfo][MIPS] Don't describe parameters loaded by sub/super reg copy 2020-06-22 10:49:02 +02:00
dbg-call-site-delay-slot-interpretation-64bit.mir
dbg-call-site-delay-slot-interpretation.mir
dbg-call-site-param-addiu-64bit.mir
dbg-call-site-param-addiu.mir
last-inst-bundled.mir [LiveDebugValues][NFC] Re-land 60db26a66d, add instr-ref tests 2020-09-11 12:14:44 +01:00
lit.local.cfg
live-debug-values-reg-copy.mir