Alexandros Lamprineas a50e569197 [AArch64] Add a Machine Value Type for 8 consecutive registers ... Adds MVT::i64x8, a Machine Value Type needed for lowering inline assembly operands which materialize a sequence of eight general purpose registers. Differential Revision: https://reviews.llvm.org/D94096		2021-08-02 15:45:58 +01:00
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GlobalISel
AsmMatcherEmitter.cpp
AsmWriterEmitter.cpp
AsmWriterInst.cpp
AsmWriterInst.h
Attributes.cpp
CallingConvEmitter.cpp
CMakeLists.txt
CodeBeadsGen.cpp
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp
CodeGenDAGPatterns.h
CodeGenHwModes.cpp
CodeGenHwModes.h
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenMapTable.cpp
CodeGenRegisters.cpp
CodeGenRegisters.h
CodeGenSchedule.cpp
CodeGenSchedule.h
CodeGenTarget.cpp
CodeGenTarget.h
CTagsEmitter.cpp
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAEmitter.cpp
DFAEmitter.h
DFAPacketizerEmitter.cpp
DirectiveEmitter.cpp
DisassemblerEmitter.cpp
ExegesisEmitter.cpp
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp
GICombinerEmitter.cpp
GlobalISelEmitter.cpp
InfoByHwMode.cpp
InfoByHwMode.h
InstrDocsEmitter.cpp
InstrInfoEmitter.cpp
IntrinsicEmitter.cpp
OptEmitter.cpp
OptEmitter.h
OptParserEmitter.cpp
OptRSTEmitter.cpp
PredicateExpander.cpp
PredicateExpander.h
PseudoLoweringEmitter.cpp
RegisterBankEmitter.cpp
RegisterInfoEmitter.cpp
RISCVCompressInstEmitter.cpp
SDNodeProperties.cpp
SDNodeProperties.h
SearchableTableEmitter.cpp
SequenceToOffsetTable.h
SubtargetEmitter.cpp
SubtargetFeatureInfo.cpp
SubtargetFeatureInfo.h
TableGen.cpp
TableGenBackends.h
tdtags
Types.cpp
Types.h
WebAssemblyDisassemblerEmitter.cpp
WebAssemblyDisassemblerEmitter.h
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86EVEX2VEXTablesEmitter.cpp
X86FoldTablesEmitter.cpp
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp
X86RecognizableInstr.h