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llvm-mirror/test/Transforms/InstCombine/r600-intrinsics.ll
Matt Arsenault b82983ef6a R600/SI: Add intrinsics for various math instructions.
These will be used for custom lowering and for library
implementations of various math functions, so it's useful
to expose these as builtins.

llvm-svn: 211247
2014-06-19 01:19:19 +00:00

48 lines
1.6 KiB
LLVM

; RUN: opt -instcombine -S < %s | FileCheck %s
declare float @llvm.AMDGPU.rcp.f32(float) nounwind readnone
declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone
; CHECK-LABEL: @test_constant_fold_rcp_f32_1
; CHECK-NEXT: ret float 1.000000e+00
define float @test_constant_fold_rcp_f32_1() nounwind {
%val = call float @llvm.AMDGPU.rcp.f32(float 1.0) nounwind readnone
ret float %val
}
; CHECK-LABEL: @test_constant_fold_rcp_f64_1
; CHECK-NEXT: ret double 1.000000e+00
define double @test_constant_fold_rcp_f64_1() nounwind {
%val = call double @llvm.AMDGPU.rcp.f64(double 1.0) nounwind readnone
ret double %val
}
; CHECK-LABEL: @test_constant_fold_rcp_f32_half
; CHECK-NEXT: ret float 2.000000e+00
define float @test_constant_fold_rcp_f32_half() nounwind {
%val = call float @llvm.AMDGPU.rcp.f32(float 0.5) nounwind readnone
ret float %val
}
; CHECK-LABEL: @test_constant_fold_rcp_f64_half
; CHECK-NEXT: ret double 2.000000e+00
define double @test_constant_fold_rcp_f64_half() nounwind {
%val = call double @llvm.AMDGPU.rcp.f64(double 0.5) nounwind readnone
ret double %val
}
; CHECK-LABEL: @test_constant_fold_rcp_f32_43
; CHECK-NEXT: call float @llvm.AMDGPU.rcp.f32(float 4.300000e+01)
define float @test_constant_fold_rcp_f32_43() nounwind {
%val = call float @llvm.AMDGPU.rcp.f32(float 4.300000e+01) nounwind readnone
ret float %val
}
; CHECK-LABEL: @test_constant_fold_rcp_f64_43
; CHECK-NEXT: call double @llvm.AMDGPU.rcp.f64(double 4.300000e+01)
define double @test_constant_fold_rcp_f64_43() nounwind {
%val = call double @llvm.AMDGPU.rcp.f64(double 4.300000e+01) nounwind readnone
ret double %val
}