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f0af6362fd
Some of them also had the pattern on both, so this removes the duplication. llvm-svn: 204492
33 lines
1.0 KiB
LLVM
33 lines
1.0 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
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; SI-LABEL: @vector_umin
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; SI: V_MIN_U32_e32
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define void @vector_umin(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 {
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main_body:
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%load = load i32 addrspace(1)* %in, align 4
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%min = call i32 @llvm.AMDGPU.umin(i32 %p0, i32 %load)
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%bc = bitcast i32 %min to float
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
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ret void
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}
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; SI-LABEL: @scalar_umin
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; SI: S_MIN_U32
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define void @scalar_umin(i32 %p0, i32 %p1) #0 {
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entry:
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%min = call i32 @llvm.AMDGPU.umin(i32 %p0, i32 %p1)
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%bc = bitcast i32 %min to float
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call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
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ret void
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}
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; Function Attrs: readnone
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declare i32 @llvm.AMDGPU.umin(i32, i32) #1
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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!0 = metadata !{metadata !"const", null, i32 1}
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