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llvm-mirror/test/CodeGen/Lanai
Jacques Pienaar f56d44dbb2 [lanai] Use peephole optimizer to generate more conditional ALU operations.
Summary:
* Similiar to the ARM backend yse the peephole optimizer to generate more conditional ALU operations;
* Add predicated type with default always true to RR instructions in LanaiInstrInfo.td;
* Move LanaiSetflagAluCombiner into optimizeCompare;
* The ASM parser can currently only handle explicitly specified CC, so specify ".t" (true) where needed in the ASM test;
* Remove unused MachineOperand flags;

Reviewers: eliben

Subscribers: aemerson

Differential Revision: http://reviews.llvm.org/D22072

llvm-svn: 274807
2016-07-07 23:36:04 +00:00
..
codemodel.ll
comparisons_i32.ll
comparisons_i64.ll [lanai] Add lowering for SETCCE i32. 2016-04-19 19:15:25 +00:00
constant_multiply.ll
delay_filler.ll
i32.ll
lanai-misched-trivial-disjoint.ll
lit.local.cfg
mem_alu_combiner.ll [lanai] Change reloc to use PIC_ by default and cleanup. 2016-05-20 21:41:53 +00:00
multiply.ll
rshift64.ll
select.ll [lanai] Add lowering for SETCCE i32. 2016-04-19 19:15:25 +00:00
set_and_hi.ll
shift.ll
stack-frame.ll
sub-cmp-peephole.ll [lanai] Use peephole optimizer to generate more conditional ALU operations. 2016-07-07 23:36:04 +00:00
subword.ll [lanai] Add subword scheduling itineraries. 2016-04-20 18:28:55 +00:00