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Summary: Writing support for three ACLE functions: unsigned int __cls(uint32_t x) unsigned int __clsl(unsigned long x) unsigned int __clsll(uint64_t x) CLS stands for "Count number of leading sign bits". In AArch64, these two intrinsics can be translated into the 'cls' instruction directly. In AArch32, on the other hand, this functionality is achieved by implementing it in terms of clz (count number of leading zeros). Reviewers: compnerd Reviewed By: compnerd Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D69250
28 lines
793 B
LLVM
28 lines
793 B
LLVM
; RUN: llc -mtriple=armv5 %s -o - | FileCheck %s
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; CHECK: eor [[T:r[0-9]+]], [[T]], [[T]], asr #31
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; CHECK-NEXT: mov [[C1:r[0-9]+]], #1
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; CHECK-NEXT: orr [[T]], [[C1]], [[T]], lsl #1
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; CHECK-NEXT: clz [[T]], [[T]]
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define i32 @cls(i32 %t) {
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%cls.i = call i32 @llvm.arm.cls(i32 %t)
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ret i32 %cls.i
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}
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; CHECK: cmp r1, #0
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; CHECK: mvnne [[ADJUSTEDLO:r[0-9]+]], r0
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; CHECK: clz [[CLZLO:r[0-9]+]], [[ADJUSTEDLO]]
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; CHECK: eor [[A:r[0-9]+]], r1, r1, asr #31
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; CHECK: mov r1, #1
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; CHECK: orr [[A]], r1, [[A]], lsl #1
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; CHECK: clz [[CLSHI:r[0-9]+]], [[A]]
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; CHECK: cmp [[CLSHI]], #31
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; CHECK: addeq r0, [[CLZLO]], #31
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define i32 @cls64(i64 %t) {
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%cls.i = call i32 @llvm.arm.cls64(i64 %t)
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ret i32 %cls.i
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}
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declare i32 @llvm.arm.cls(i32) nounwind
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declare i32 @llvm.arm.cls64(i64) nounwind
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