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e24be6085b
This essentially reverts the x86-64 side effect of r327198. For x86-32, @PLT (R_386_PLT32) is not suitable in -fno-pic mode so the code forces MO_NO_FLAG (like a forced dso_local) (https://bugs.llvm.org//show_bug.cgi?id=36674#c6). For x86-64, both `call/jmp foo` and `call/jmp foo@PLT` emit R_X86_64_PLT32 (https://sourceware.org/bugzilla/show_bug.cgi?id=22791) so there is no difference using @PLT. Using @PLT is actually favorable because this drops a difference with -fpie/-fpic code and makes it possible to avoid a canonical PLT entry when taking the address of an undefined function symbol.
102 lines
2.9 KiB
LLVM
102 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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define i64 @testmsxs(float %x) {
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; X86-LABEL: testmsxs:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %eax
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NEXT: fstps (%esp)
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; X86-NEXT: calll llroundf
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; X86-NEXT: popl %ecx
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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;
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; SSE2-LABEL: testmsxs:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: pushl %eax
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; SSE2-NEXT: .cfi_def_cfa_offset 8
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; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE2-NEXT: movss %xmm0, (%esp)
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; SSE2-NEXT: calll llroundf
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; SSE2-NEXT: popl %ecx
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; SSE2-NEXT: .cfi_def_cfa_offset 4
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; SSE2-NEXT: retl
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;
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; X64-LABEL: testmsxs:
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; X64: # %bb.0: # %entry
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; X64-NEXT: jmp llroundf@PLT # TAILCALL
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entry:
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%0 = tail call i64 @llvm.llround.f32(float %x)
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ret i64 %0
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}
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define i64 @testmsxd(double %x) {
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; X86-LABEL: testmsxd:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: .cfi_def_cfa_offset 12
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; X86-NEXT: fldl {{[0-9]+}}(%esp)
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; X86-NEXT: fstpl (%esp)
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; X86-NEXT: calll llround
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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;
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; SSE2-LABEL: testmsxd:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: subl $8, %esp
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; SSE2-NEXT: .cfi_def_cfa_offset 12
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; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSE2-NEXT: movsd %xmm0, (%esp)
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; SSE2-NEXT: calll llround
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; SSE2-NEXT: addl $8, %esp
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; SSE2-NEXT: .cfi_def_cfa_offset 4
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; SSE2-NEXT: retl
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;
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; X64-LABEL: testmsxd:
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; X64: # %bb.0: # %entry
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; X64-NEXT: jmp llround@PLT # TAILCALL
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entry:
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%0 = tail call i64 @llvm.llround.f64(double %x)
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ret i64 %0
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}
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define i64 @testmsll(x86_fp80 %x) {
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; X86-LABEL: testmsll:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $12, %esp
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; X86-NEXT: .cfi_def_cfa_offset 16
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; X86-NEXT: fldt {{[0-9]+}}(%esp)
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; X86-NEXT: fstpt (%esp)
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; X86-NEXT: calll llroundl
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; X86-NEXT: addl $12, %esp
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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;
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; SSE2-LABEL: testmsll:
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; SSE2: # %bb.0: # %entry
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; SSE2-NEXT: subl $12, %esp
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; SSE2-NEXT: .cfi_def_cfa_offset 16
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; SSE2-NEXT: fldt {{[0-9]+}}(%esp)
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; SSE2-NEXT: fstpt (%esp)
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; SSE2-NEXT: calll llroundl
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; SSE2-NEXT: addl $12, %esp
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; SSE2-NEXT: .cfi_def_cfa_offset 4
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; SSE2-NEXT: retl
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;
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; X64-LABEL: testmsll:
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; X64: # %bb.0: # %entry
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; X64-NEXT: jmp llroundl@PLT # TAILCALL
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entry:
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%0 = tail call i64 @llvm.llround.f80(x86_fp80 %x)
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ret i64 %0
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}
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declare i64 @llvm.llround.f32(float) nounwind readnone
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declare i64 @llvm.llround.f64(double) nounwind readnone
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declare i64 @llvm.llround.f80(x86_fp80) nounwind readnone
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