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This patch resolves the suboptimal codegen described in http://llvm.org/pr47873 . When CodeGenPrepare lowers select into a conditional branch, a freeze instruction is inserted. It is then translated to `BRCOND(FREEZE(SETCC))` in SelDag. The `FREEZE` in the middle of `SETCC` and `BRCOND` was causing a suboptimal code generation however. This patch adds `BRCOND(FREEZE(cond))` -> `BRCOND(cond)` fold to DAGCombiner to remove the `FREEZE`. To make this optimization sound, `BRCOND(UNDEF)` simply should nondeterministically jump to the branch or not, rather than raising UB. It wasn't clear what happens when the condition was undef according to the comments in ISDOpcodes.h, however. I updated the comments of `BRCOND` to make it explicit (as well as `BR_CC`, which is also a conditional branch instruction). Note that it diverges from the semantics of `br` instruction in IR, which is explicitly UB. Since the UB semantics was necessary to explain optimizations that use branching conditions, and SelDag doesn't seem to have such optimization, I think this divergence is okay. Reviewed By: spatel Differential Revision: https://reviews.llvm.org/D92015
22 lines
671 B
LLVM
22 lines
671 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; Compiling the select should not create 'seta - testb $1 - jump' sequence.
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define i32 @f(i32 %x, i32 %y) {
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; CHECK-LABEL: f:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: cmpl %esi, %edi
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; CHECK-NEXT: ja .LBB0_2
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; CHECK-NEXT: # %bb.1: # %select.false
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: .LBB0_2: # %select.end
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; CHECK-NEXT: retq
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entry:
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%cmp = icmp ugt i32 %x, %y
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%z = select i1 %cmp, i32 %x, i32 %y, !prof !0
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ret i32 %z
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}
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!0 = !{!"branch_weights", i32 1, i32 2000}
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