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https://github.com/RPCS3/llvm-mirror.git
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4ffec57899
Summary: Simplify the right shift of the intermediate result (given in four parts) by using funnel shift. There are some impact on lit tests, but that seems to be related to register allocation differences due to how FSHR is expanded on X86 (giving a slightly different operand order for the OR operations compared to the old code). Reviewers: leonardchan, RKSimon, spatel, lebedev.ri Reviewed By: RKSimon Subscribers: hiraditya, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, s.egerton, pzheng, bevinh, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67036 llvm-svn: 370813
414 lines
12 KiB
LLVM
414 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
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declare i4 @llvm.smul.fix.i4 (i4, i4, i32)
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declare i32 @llvm.smul.fix.i32 (i32, i32, i32)
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declare i64 @llvm.smul.fix.i64 (i64, i64, i32)
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declare <4 x i32> @llvm.smul.fix.v4i32(<4 x i32>, <4 x i32>, i32)
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define i32 @func(i32 %x, i32 %y) nounwind {
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; X64-LABEL: func:
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; X64: # %bb.0:
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; X64-NEXT: movslq %esi, %rax
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; X64-NEXT: movslq %edi, %rcx
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; X64-NEXT: imulq %rax, %rcx
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; X64-NEXT: movq %rcx, %rax
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; X64-NEXT: shrq $32, %rax
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; X64-NEXT: shldl $30, %ecx, %eax
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; X64-NEXT: # kill: def $eax killed $eax killed $rax
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; X64-NEXT: retq
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;
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; X86-LABEL: func:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: imull {{[0-9]+}}(%esp)
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; X86-NEXT: shrdl $2, %edx, %eax
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; X86-NEXT: retl
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%tmp = call i32 @llvm.smul.fix.i32(i32 %x, i32 %y, i32 2)
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ret i32 %tmp
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}
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define i64 @func2(i64 %x, i64 %y) {
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; X64-LABEL: func2:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: imulq %rsi
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; X64-NEXT: shrdq $2, %rdx, %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: func2:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: pushl %ebx
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; X86-NEXT: .cfi_def_cfa_offset 12
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; X86-NEXT: pushl %edi
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; X86-NEXT: .cfi_def_cfa_offset 16
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; X86-NEXT: pushl %esi
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; X86-NEXT: .cfi_def_cfa_offset 20
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; X86-NEXT: .cfi_offset %esi, -20
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; X86-NEXT: .cfi_offset %edi, -16
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; X86-NEXT: .cfi_offset %ebx, -12
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ebx, %eax
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; X86-NEXT: mull {{[0-9]+}}(%esp)
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; X86-NEXT: movl %edx, %esi
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; X86-NEXT: movl %eax, %edi
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; X86-NEXT: movl %ebx, %eax
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; X86-NEXT: mull %ecx
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; X86-NEXT: movl %eax, %ebx
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; X86-NEXT: movl %edx, %ebp
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; X86-NEXT: addl %edi, %ebp
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: adcl $0, %esi
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; X86-NEXT: movl %edi, %eax
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; X86-NEXT: mull %ecx
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; X86-NEXT: addl %ebp, %eax
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; X86-NEXT: adcl %esi, %edx
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; X86-NEXT: movl %edi, %esi
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; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
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; X86-NEXT: addl %edx, %esi
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; X86-NEXT: movl %esi, %ebp
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; X86-NEXT: subl %ecx, %ebp
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; X86-NEXT: testl %edi, %edi
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; X86-NEXT: cmovnsl %esi, %ebp
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; X86-NEXT: movl %ebp, %edx
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; X86-NEXT: subl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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; X86-NEXT: cmovnsl %ebp, %edx
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; X86-NEXT: shldl $30, %eax, %edx
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; X86-NEXT: shldl $30, %ebx, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: .cfi_def_cfa_offset 16
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; X86-NEXT: popl %edi
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; X86-NEXT: .cfi_def_cfa_offset 12
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; X86-NEXT: popl %ebx
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: popl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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%tmp = call i64 @llvm.smul.fix.i64(i64 %x, i64 %y, i32 2)
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ret i64 %tmp
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}
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define i4 @func3(i4 %x, i4 %y) nounwind {
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; X64-LABEL: func3:
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; X64: # %bb.0:
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; X64-NEXT: shlb $4, %dil
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; X64-NEXT: sarb $4, %dil
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; X64-NEXT: shlb $4, %sil
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; X64-NEXT: sarb $4, %sil
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; X64-NEXT: movsbl %sil, %ecx
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: imull %ecx, %eax
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; X64-NEXT: movl %eax, %ecx
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; X64-NEXT: shrb $2, %cl
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; X64-NEXT: shrl $8, %eax
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; X64-NEXT: shlb $6, %al
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; X64-NEXT: orb %cl, %al
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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;
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; X86-LABEL: func3:
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; X86: # %bb.0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %al
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; X86-NEXT: shlb $4, %al
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; X86-NEXT: sarb $4, %al
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: shlb $4, %cl
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; X86-NEXT: sarb $4, %cl
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; X86-NEXT: movsbl %cl, %ecx
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; X86-NEXT: movsbl %al, %eax
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; X86-NEXT: imull %ecx, %eax
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; X86-NEXT: shlb $6, %ah
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; X86-NEXT: shrb $2, %al
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; X86-NEXT: orb %ah, %al
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; X86-NEXT: # kill: def $al killed $al killed $eax
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; X86-NEXT: retl
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%tmp = call i4 @llvm.smul.fix.i4(i4 %x, i4 %y, i32 2)
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ret i4 %tmp
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}
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define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
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; X64-LABEL: vec:
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; X64: # %bb.0:
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; X64-NEXT: pxor %xmm2, %xmm2
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; X64-NEXT: pxor %xmm3, %xmm3
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; X64-NEXT: pcmpgtd %xmm1, %xmm3
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; X64-NEXT: pand %xmm0, %xmm3
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; X64-NEXT: pcmpgtd %xmm0, %xmm2
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; X64-NEXT: pand %xmm1, %xmm2
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; X64-NEXT: paddd %xmm3, %xmm2
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; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
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; X64-NEXT: pmuludq %xmm1, %xmm0
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; X64-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,3,2,3]
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; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; X64-NEXT: pmuludq %xmm3, %xmm1
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; X64-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]
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; X64-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
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; X64-NEXT: psubd %xmm2, %xmm4
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; X64-NEXT: pslld $30, %xmm4
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; X64-NEXT: psrld $2, %xmm0
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; X64-NEXT: por %xmm4, %xmm0
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; X64-NEXT: retq
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;
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; X86-LABEL: vec:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: imull {{[0-9]+}}(%esp)
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; X86-NEXT: movl %edx, %ebp
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; X86-NEXT: shldl $30, %eax, %ebp
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; X86-NEXT: movl %ebx, %eax
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; X86-NEXT: imull {{[0-9]+}}(%esp)
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; X86-NEXT: movl %edx, %ebx
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; X86-NEXT: shldl $30, %eax, %ebx
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; X86-NEXT: movl %edi, %eax
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; X86-NEXT: imull {{[0-9]+}}(%esp)
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; X86-NEXT: movl %edx, %edi
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; X86-NEXT: shldl $30, %eax, %edi
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: imull {{[0-9]+}}(%esp)
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; X86-NEXT: shldl $30, %eax, %edx
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; X86-NEXT: movl %edx, 12(%ecx)
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; X86-NEXT: movl %edi, 8(%ecx)
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; X86-NEXT: movl %ebx, 4(%ecx)
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; X86-NEXT: movl %ebp, (%ecx)
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl $4
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%tmp = call <4 x i32> @llvm.smul.fix.v4i32(<4 x i32> %x, <4 x i32> %y, i32 2)
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ret <4 x i32> %tmp
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}
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; These result in regular integer multiplication
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define i32 @func4(i32 %x, i32 %y) nounwind {
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; X64-LABEL: func4:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: imull %esi, %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: func4:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: imull {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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%tmp = call i32 @llvm.smul.fix.i32(i32 %x, i32 %y, i32 0)
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ret i32 %tmp
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}
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define i64 @func5(i64 %x, i64 %y) {
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; X64-LABEL: func5:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: imulq %rsi, %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: func5:
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; X86: # %bb.0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: .cfi_offset %esi, -8
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: mull %esi
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; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: addl %ecx, %edx
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; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
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; X86-NEXT: addl %esi, %edx
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; X86-NEXT: popl %esi
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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%tmp = call i64 @llvm.smul.fix.i64(i64 %x, i64 %y, i32 0)
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ret i64 %tmp
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}
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define i4 @func6(i4 %x, i4 %y) nounwind {
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; X64-LABEL: func6:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shlb $4, %al
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; X64-NEXT: sarb $4, %al
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; X64-NEXT: shlb $4, %sil
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; X64-NEXT: sarb $4, %sil
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: mulb %sil
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; X64-NEXT: retq
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;
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; X86-LABEL: func6:
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; X86: # %bb.0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %al
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; X86-NEXT: shlb $4, %al
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; X86-NEXT: sarb $4, %al
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: shlb $4, %cl
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; X86-NEXT: sarb $4, %cl
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; X86-NEXT: mulb %cl
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; X86-NEXT: retl
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%tmp = call i4 @llvm.smul.fix.i4(i4 %x, i4 %y, i32 0)
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ret i4 %tmp
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}
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define <4 x i32> @vec2(<4 x i32> %x, <4 x i32> %y) nounwind {
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; X64-LABEL: vec2:
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; X64: # %bb.0:
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; X64-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
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; X64-NEXT: pmuludq %xmm1, %xmm0
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
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; X64-NEXT: pmuludq %xmm2, %xmm1
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; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; X64-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; X64-NEXT: retq
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;
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; X86-LABEL: vec2:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: imull {{[0-9]+}}(%esp), %edi
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; X86-NEXT: imull {{[0-9]+}}(%esp), %esi
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; X86-NEXT: imull {{[0-9]+}}(%esp), %edx
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; X86-NEXT: imull {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ecx, 12(%eax)
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; X86-NEXT: movl %edx, 8(%eax)
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; X86-NEXT: movl %esi, 4(%eax)
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; X86-NEXT: movl %edi, (%eax)
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl $4
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%tmp = call <4 x i32> @llvm.smul.fix.v4i32(<4 x i32> %x, <4 x i32> %y, i32 0)
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ret <4 x i32> %tmp
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}
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define i64 @func7(i64 %x, i64 %y) nounwind {
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; X64-LABEL: func7:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: imulq %rsi
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; X64-NEXT: shrdq $32, %rdx, %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: func7:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: mull {{[0-9]+}}(%esp)
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; X86-NEXT: movl %edx, %edi
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; X86-NEXT: movl %eax, %ebx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: mull %ebp
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; X86-NEXT: addl %edx, %ebx
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; X86-NEXT: adcl $0, %edi
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: mull %ebp
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; X86-NEXT: addl %ebx, %eax
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; X86-NEXT: adcl %edi, %edx
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; X86-NEXT: movl %esi, %edi
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; X86-NEXT: imull {{[0-9]+}}(%esp), %edi
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; X86-NEXT: addl %edx, %edi
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; X86-NEXT: movl %edi, %ebx
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; X86-NEXT: subl %ebp, %ebx
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; X86-NEXT: testl %esi, %esi
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; X86-NEXT: cmovnsl %edi, %ebx
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; X86-NEXT: movl %ebx, %edx
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; X86-NEXT: subl %ecx, %edx
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; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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; X86-NEXT: cmovnsl %ebx, %edx
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl
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%tmp = call i64 @llvm.smul.fix.i64(i64 %x, i64 %y, i32 32)
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ret i64 %tmp
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}
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define i64 @func8(i64 %x, i64 %y) nounwind {
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; X64-LABEL: func8:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: imulq %rsi
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; X64-NEXT: shrdq $63, %rdx, %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: func8:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: mull {{[0-9]+}}(%esp)
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; X86-NEXT: movl %edx, %edi
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; X86-NEXT: movl %eax, %ebx
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: mull {{[0-9]+}}(%esp)
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; X86-NEXT: addl %edx, %ebx
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; X86-NEXT: adcl $0, %edi
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: imull {{[0-9]+}}(%esp)
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; X86-NEXT: movl %edx, %ebp
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: mull {{[0-9]+}}(%esp)
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; X86-NEXT: addl %ebx, %eax
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; X86-NEXT: adcl %edi, %edx
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; X86-NEXT: adcl $0, %ebp
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; X86-NEXT: addl %ecx, %edx
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; X86-NEXT: adcl $0, %ebp
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; X86-NEXT: movl %edx, %ecx
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; X86-NEXT: subl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ebp, %esi
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; X86-NEXT: sbbl $0, %esi
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; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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; X86-NEXT: cmovnsl %ebp, %esi
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; X86-NEXT: cmovnsl %edx, %ecx
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; X86-NEXT: movl %ecx, %edi
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; X86-NEXT: subl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: movl %esi, %edx
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; X86-NEXT: sbbl $0, %edx
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; X86-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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; X86-NEXT: cmovnsl %esi, %edx
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; X86-NEXT: cmovnsl %ecx, %edi
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; X86-NEXT: shldl $1, %edi, %edx
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; X86-NEXT: shrdl $31, %edi, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl
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%tmp = call i64 @llvm.smul.fix.i64(i64 %x, i64 %y, i32 63)
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ret i64 %tmp
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}
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