1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
llvm-mirror/test/CodeGen/X86/vshift_split.ll
Simon Pilgrim 29e9d9a1e2 [X86] Regenerate vector shift tests. NFCI.
Merge prefixes where possible, use 'X86' instead of 'X32' (which we try to only use for gnux32 triple tests).
2020-10-27 13:14:54 +00:00

17 lines
575 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; Example that requires splitting and expanding a vector shift.
define <2 x i64> @update(<2 x i64> %val) nounwind readnone {
; CHECK-LABEL: update:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movdqa %xmm0, %xmm1
; CHECK-NEXT: psrlq $2, %xmm1
; CHECK-NEXT: psrlq $3, %xmm0
; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; CHECK-NEXT: retl
entry:
%shr = lshr <2 x i64> %val, < i64 2, i64 3 >
ret <2 x i64> %shr
}