mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-26 12:43:36 +01:00
930aaa18e9
There is not an official documented ABI for frame pointers in Thumb2, but we should try to emit something which is useful. We use r7 as the frame pointer for Thumb code, which currently means that if a function needs to save a high register (r8-r11), it will get pushed to the stack between the frame pointer (r7) and link register (r14). This means that while a stack unwinder can follow the chain of frame pointers up the stack, it cannot know the offset to lr, so does not know which functions correspond to the stack frames. To fix this, we need to push the callee-saved registers in two batches, with the first push saving the low registers, fp and lr, and the second push saving the high registers. This is already implemented, but previously only used for iOS. This patch turns it on for all Thumb2 targets when frame pointers are required by the ABI, and the frame pointer is r7 (Windows uses r11, so this isn't a problem there). If frame pointer elimination is enabled we still emit a single push/pop even if we need a frame pointer for other reasons, to avoid increasing code size. We must also ensure that lr is pushed to the stack when using a frame pointer, so that we end up with a complete frame record. Situations that could cause this were rare, because we already push lr in most situations so that we can return using the pop instruction. Differential Revision: https://reviews.llvm.org/D23516 llvm-svn: 279506
64 lines
2.0 KiB
LLVM
64 lines
2.0 KiB
LLVM
; RUN: llc < %s -mtriple thumbv7s-apple-darwin -asm-verbose=false | FileCheck %s
|
|
; RUN: llc < %s -mtriple thumbv7s-apple-darwin -asm-verbose=false -print-machineinstrs=if-converter 2>&1 | FileCheck --check-prefix=CHECK-PROB %s
|
|
|
|
declare i32 @foo(i32)
|
|
declare i8* @bar(i32, i8*, i8*)
|
|
|
|
; Verify that we don't try to iteratively re-ifconvert a block with a
|
|
; (predicated) indirectbr terminator.
|
|
; If we do, we would ignore its fallthrough successor.
|
|
|
|
|
|
; CHECK-LABEL: test:
|
|
; CHECK: cmp {{.*}}, #21
|
|
; CHECK-NEXT: itt eq
|
|
; CHECK-NEXT: streq.w
|
|
; CHECK-NEXT: moveq pc
|
|
; CHECK-NEXT: LBB{{[0-9_]+}}:
|
|
; CHECK-NEXT: cmp {{.*}}, #42
|
|
; CHECK-NEXT: beq [[CALL_FOO_1234:LBB[0-9_]+]]
|
|
; CHECK-NEXT: ldr {{.*}}[sp
|
|
; CHECK-NEXT: str
|
|
; CHECK-NEXT: mov pc
|
|
; CHECK-NEXT: Ltmp
|
|
; CHECK-NEXT: [[CALL_FOO_1234]]:
|
|
; CHECK-NEXT: movw r0, #1234
|
|
; CHECK-NEXT: b [[FOOCALL:LBB[0-9_]+]]
|
|
; CHECK-NEXT: Ltmp
|
|
; CHECK-NEXT: LBB{{[0-9_]+}}:
|
|
; CHECK-NEXT: movw r0, #4567
|
|
; CHECK-NEXT: [[FOOCALL]]:
|
|
; CHECK-NEXT: bl _foo
|
|
;
|
|
; CHECK-PROB: BB#0:
|
|
; CHECK-PROB: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}50.00%) BB#3({{[0-9a-fx/= ]+}}25.00%) BB#5({{[0-9a-fx/= ]+}}25.00%)
|
|
; CHECK-PROB: BB#2:
|
|
; CHECK-PROB: Successors according to CFG: BB#3({{[0-9a-fx/= ]+}}50.00%) BB#5({{[0-9a-fx/= ]+}}50.00%)
|
|
|
|
define i32 @test(i32 %a, i32 %a2, i32* %p, i32* %p2) "no-frame-pointer-elim"="true" {
|
|
entry:
|
|
%dst1 = call i8* @bar(i32 1, i8* blockaddress(@test, %bb1), i8* blockaddress(@test, %bb2))
|
|
%dst2 = call i8* @bar(i32 2, i8* blockaddress(@test, %bb1), i8* blockaddress(@test, %bb2))
|
|
%dst3 = call i8* @bar(i32 3, i8* blockaddress(@test, %bb1), i8* blockaddress(@test, %bb2))
|
|
%cc1 = icmp eq i32 %a, 21
|
|
br i1 %cc1, label %cc1t, label %cc1f
|
|
|
|
cc1t:
|
|
store i32 %a, i32* %p
|
|
indirectbr i8* %dst3, [label %bb1, label %bb2]
|
|
|
|
cc1f:
|
|
%cc2 = icmp ne i32 %a2, 42
|
|
br i1 %cc2, label %cc2t, label %bb1
|
|
cc2t:
|
|
store i32 %a, i32* %p2
|
|
indirectbr i8* %dst1, [label %bb1, label %bb2]
|
|
|
|
bb1:
|
|
%ret_bb1 = call i32 @foo(i32 1234)
|
|
ret i32 %ret_bb1
|
|
bb2:
|
|
%ret_bb2 = call i32 @foo(i32 4567)
|
|
ret i32 %ret_bb2
|
|
}
|