Sanjay Patel 7530f47511 [x86] replace integer logic ops with packed SSE FP logic ops ... If we have an operand to a bitwise logic op that's already in an XMM register and the result is going to be sent to an XMM register, then use an SSE logic op to avoid moves between the integer and vector register files. Related commits: http://reviews.llvm.org/rL248395 http://reviews.llvm.org/rL248399 http://reviews.llvm.org/rL248404 http://reviews.llvm.org/rL248409 http://reviews.llvm.org/rL248415 This should solve PR22428: https://llvm.org/bugs/show_bug.cgi?id=22428 llvm-svn: 251378		2015-10-27 01:28:07 +00:00
..
AArch64	Revert "[AArch64]Merge halfword loads into a 32-bit load"	2015-10-23 10:41:38 +00:00
AMDGPU	AMDGPU: Fix verifier error in SIFoldOperands	2015-10-21 22:37:50 +00:00
ARM	ARM: make sure VFP loads and stores are properly aligned.	2015-10-26 21:32:53 +00:00
BPF	[bpf] Do not expand UNDEF SDNode during insn selection lowering	2015-10-08 18:52:40 +00:00
CPP
Generic	[Hexagon] Reverting test file change.	2015-10-17 01:58:51 +00:00
Hexagon	Tail duplication can mix incompatible registers in phi nodes	2015-10-21 02:40:06 +00:00
Inputs
Mips	[mips] Check for the correct error message in tests for interrupt attributes.	2015-10-26 14:24:30 +00:00
MIR	[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.	2015-10-15 14:34:23 +00:00
MSP430
NVPTX
PowerPC	[MachO] Stop generating *coal* sections.	2015-10-15 05:28:38 +00:00
SPARC	Drop assert that a call with struct return goes to a function with sret	2015-10-21 20:05:01 +00:00
SystemZ	[SystemZ] LTGFR use regclass should be GR32, not GR64.	2015-10-26 15:03:49 +00:00
Thumb	[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.	2015-10-05 14:49:54 +00:00
Thumb2	[ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev	2015-10-23 17:19:19 +00:00
WebAssembly	WebAssembly: fix more syntax	2015-10-22 02:32:50 +00:00
WinEH	[WinEH] Fix eh.exceptionpointer intrinsic lowering	2015-10-17 00:08:08 +00:00
X86	[x86] replace integer logic ops with packed SSE FP logic ops	2015-10-27 01:28:07 +00:00
XCore