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055a23f745
Leverage ARM ELF build attribute section to create ELF attribute section for RISC-V. Extract the common part of parsing logic for this section into ELFAttributeParser.[cpp|h] and ELFAttributes.[cpp|h]. Differential Revision: https://reviews.llvm.org/D74023
26 lines
970 B
C++
26 lines
970 B
C++
//===-- RISCVAttributes.cpp - RISCV Attributes ----------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Support/RISCVAttributes.h"
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using namespace llvm;
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using namespace llvm::RISCVAttrs;
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static const TagNameItem tagData[] = {
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{STACK_ALIGN, "Tag_stack_align"},
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{ARCH, "Tag_arch"},
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{UNALIGNED_ACCESS, "Tag_unaligned_access"},
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{PRIV_SPEC, "Tag_priv_spec"},
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{PRIV_SPEC_MINOR, "Tag_priv_spec_minor"},
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{PRIV_SPEC_REVISION, "Tag_priv_spec_revision"},
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};
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const TagNameMap llvm::RISCVAttrs::RISCVAttributeTags(tagData,
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sizeof(tagData) /
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sizeof(TagNameItem));
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