Evan Cheng 0d88ad2de1 Add a hybrid bottom up scheduler that reduce register usage while avoiding ... pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot of long latency instructions so a strict register pressure reduction scheduler does not work well. Early experiments show this speeds up some NEON loops by over 30%. llvm-svn: 104216		2010-05-20 06:13:19 +00:00
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llvm	Add a hybrid bottom up scheduler that reduce register usage while avoiding	2010-05-20 06:13:19 +00:00
llvm-c	add some more (void)'s to prototypes for PR6961	2010-04-29 23:27:32 +00:00