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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
54 lines
1.8 KiB
LLVM
54 lines
1.8 KiB
LLVM
; RUN: llc -mtriple=arm64-apple-ios -O2 -aarch64-collect-loh -aarch64-collect-loh-bb-only=false < %s -o - | FileCheck %s
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; RUN: llc -mtriple=arm64-linux-gnu -O2 -aarch64-collect-loh -aarch64-collect-loh-bb-only=false < %s -o - | FileCheck %s --check-prefix=CHECK-ELF
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; CHECK-ELF-NOT: .loh
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; CHECK-ELF-NOT: AdrpAdrp
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; CHECK-ELF-NOT: AdrpAdd
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; CHECK-ELF-NOT: AdrpLdrGot
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@a = internal unnamed_addr global i32 0, align 4
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@b = external global i32
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; Function Attrs: noinline nounwind ssp
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define void @foo(i32 %t) {
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entry:
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%tmp = load i32* @a, align 4
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%add = add nsw i32 %tmp, %t
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store i32 %add, i32* @a, align 4
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ret void
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}
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; Function Attrs: nounwind ssp
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; Testcase for <rdar://problem/15438605>, AdrpAdrp reuse is valid only when the first adrp
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; dominates the second.
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; The first adrp comes from the loading of 'a' and the second the loading of 'b'.
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; 'a' is loaded in if.then, 'b' in if.end4, if.then does not dominates if.end4.
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; CHECK-LABEL: _test
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; CHECK: ret
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; CHECK-NOT: .loh AdrpAdrp
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define i32 @test(i32 %t) {
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entry:
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%cmp = icmp sgt i32 %t, 5
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br i1 %cmp, label %if.then, label %if.end4
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if.then: ; preds = %entry
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%tmp = load i32* @a, align 4
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%add = add nsw i32 %tmp, %t
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%cmp1 = icmp sgt i32 %add, 12
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br i1 %cmp1, label %if.then2, label %if.end4
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if.then2: ; preds = %if.then
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tail call void @foo(i32 %add)
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%tmp1 = load i32* @a, align 4
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br label %if.end4
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if.end4: ; preds = %if.then2, %if.then, %entry
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%t.addr.0 = phi i32 [ %tmp1, %if.then2 ], [ %t, %if.then ], [ %t, %entry ]
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%tmp2 = load i32* @b, align 4
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%add5 = add nsw i32 %tmp2, %t.addr.0
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tail call void @foo(i32 %add5)
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%tmp3 = load i32* @b, align 4
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%add6 = add nsw i32 %tmp3, %t.addr.0
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ret i32 %add6
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}
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