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a7843cefbb
When generating a floating point comparison we currently unconditionally generate VCMPE. This has the sideeffect of setting the cumulative Invalid bit in FPSCR if any of the operands are QNaN. It is expected that use of a relational predicate on a QNaN value should raise Invalid. Quoting from the C standard: The relational and equality operators support the usual mathematical relationships between numeric values. For any ordered pair of numeric values exactly one of relationships the less, greater, equal and is true. Relational operators may raise the floating-point exception when argument values are NaNs. The standard doesn't explicitly state the expectation for equality operators, but the implication and obvious expectation is that equality operators should not raise Invalid on a QNaN input, as those predicates are wholly defined on unordered inputs (to return not equal). Therefore, add a new operand to ARMISD::FPCMP and FPCMPZ indicating if QNaN should raise Invalid, and pipe that through to TableGen. llvm-svn: 294945
145 lines
5.8 KiB
LLVM
145 lines
5.8 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
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; RUN: llc < %s -O0 -mattr=+strict-align -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -mattr=+strict-align -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-STRICT-ALIGN
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
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; RUN: llc < %s -O0 -mattr=+strict-align -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -mattr=+strict-align -relocation-model=dynamic-no-pic -mtriple=thumbv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-STRICT-ALIGN
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-nacl -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -mattr=+strict-align -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-nacl -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -mattr=+strict-align -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-unknown-unknown -mattr=+strict-align -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-STRICT-ALIGN
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
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; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-unknown -mattr=+strict-align -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=thumbv7-unknown-unknown -mattr=+strict-align -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-STRICT-ALIGN
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; Check unaligned stores
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%struct.anon = type <{ float }>
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@a = common global %struct.anon* null, align 4
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define void @unaligned_store(float %x, float %y) nounwind {
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entry:
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; ARM: @unaligned_store
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; ARM: vmov r1, s0
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; ARM: str r1, [r0]
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; THUMB: @unaligned_store
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; THUMB: vmov r1, s0
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; THUMB: str r1, [r0]
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%add = fadd float %x, %y
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%0 = load %struct.anon*, %struct.anon** @a, align 4
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%x1 = getelementptr inbounds %struct.anon, %struct.anon* %0, i32 0, i32 0
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store float %add, float* %x1, align 1
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ret void
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}
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; Doublewords require only word-alignment.
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; rdar://10528060
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%struct.anon.0 = type { double }
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@foo_unpacked = common global %struct.anon.0 zeroinitializer, align 4
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define void @word_aligned_f64_store(double %a, double %b) nounwind {
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entry:
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; ARM: @word_aligned_f64_store
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; THUMB: @word_aligned_f64_store
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%add = fadd double %a, %b
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store double %add, double* getelementptr inbounds (%struct.anon.0, %struct.anon.0* @foo_unpacked, i32 0, i32 0), align 4
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; ARM: vstr d16, [r0]
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; THUMB: vstr d16, [r0]
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ret void
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}
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; Check unaligned loads of floats
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%class.TAlignTest = type <{ i16, float }>
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define zeroext i1 @unaligned_f32_load(%class.TAlignTest* %this) nounwind align 2 {
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entry:
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; ARM: @unaligned_f32_load
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; THUMB: @unaligned_f32_load
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%0 = alloca %class.TAlignTest*, align 4
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store %class.TAlignTest* %this, %class.TAlignTest** %0, align 4
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%1 = load %class.TAlignTest*, %class.TAlignTest** %0
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%2 = getelementptr inbounds %class.TAlignTest, %class.TAlignTest* %1, i32 0, i32 1
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%3 = load float, float* %2, align 1
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%4 = fcmp une float %3, 0.000000e+00
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; ARM: ldr r[[R:[0-9]+]], [r0, #2]
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; ARM: vmov s0, r[[R]]
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; ARM: vcmp.f32 s0, #0
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; THUMB: ldr.w r[[R:[0-9]+]], [r0, #2]
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; THUMB: vmov s0, r[[R]]
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; THUMB: vcmp.f32 s0, #0
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ret i1 %4
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}
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define void @unaligned_i16_store(i16 %x, i16* %y) nounwind {
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entry:
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; ARM-STRICT-ALIGN: @unaligned_i16_store
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; ARM-STRICT-ALIGN: strb
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; ARM-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: @unaligned_i16_store
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; THUMB-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: strb
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store i16 %x, i16* %y, align 1
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ret void
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}
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define i16 @unaligned_i16_load(i16* %x) nounwind {
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entry:
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; ARM-STRICT-ALIGN: @unaligned_i16_load
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; ARM-STRICT-ALIGN: ldrb
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; ARM-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: @unaligned_i16_load
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; THUMB-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: ldrb
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%0 = load i16, i16* %x, align 1
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ret i16 %0
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}
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define void @unaligned_i32_store(i32 %x, i32* %y) nounwind {
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entry:
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; ARM-STRICT-ALIGN: @unaligned_i32_store
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; ARM-STRICT-ALIGN: strb
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; ARM-STRICT-ALIGN: strb
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; ARM-STRICT-ALIGN: strb
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; ARM-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: @unaligned_i32_store
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; THUMB-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: strb
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store i32 %x, i32* %y, align 1
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ret void
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}
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define i32 @unaligned_i32_load(i32* %x) nounwind {
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entry:
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; ARM-STRICT-ALIGN: @unaligned_i32_load
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; ARM-STRICT-ALIGN: ldrb
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; ARM-STRICT-ALIGN: ldrb
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; ARM-STRICT-ALIGN: ldrb
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; ARM-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: @unaligned_i32_load
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; THUMB-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: ldrb
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%0 = load i32, i32* %x, align 1
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ret i32 %0
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}
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