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1652ed61e6
I have added a new file: llvm/test/CodeGen/AArch64/README that describes what to do in the event one of the SVE codegen tests fails the warnings check. In addition, I've added comments to all the relevant SVE tests pointing users at the README file. Differential Revision: https://reviews.llvm.org/D83467
260 lines
8.7 KiB
LLVM
260 lines
8.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
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; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
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; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
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; WARN-NOT: warning
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define <vscale x 4 x i1> @oeq(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: oeq:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: ret
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%y = fcmp oeq <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @ogt(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: ogt:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmgt p0.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: ret
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%y = fcmp ogt <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @oge(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: oge:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmge p0.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: ret
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%y = fcmp oge <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @olt(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: olt:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmgt p0.s, p0/z, z1.s, z0.s
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; CHECK-NEXT: ret
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%y = fcmp olt <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @ole(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: ole:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmge p0.s, p0/z, z1.s, z0.s
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; CHECK-NEXT: ret
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%y = fcmp ole <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @one(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: one:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmne p0.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: ret
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%y = fcmp one <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @ord(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: ord:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmuo p1.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ord <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @ueq(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: ueq:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmne p1.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ueq <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @ugt(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: ugt:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmge p1.s, p0/z, z1.s, z0.s
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ugt <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @uge(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: uge:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmgt p1.s, p0/z, z1.s, z0.s
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp uge <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @ult(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: ult:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmge p1.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ult <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @ule(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: ule:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmgt p1.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ule <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @une(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: une:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmeq p1.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp une <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @uno(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: uno:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: ret
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%y = fcmp uno <vscale x 4 x float> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 2 x i1> @oeq_2f32(<vscale x 2 x float> %x, <vscale x 2 x float> %x2) {
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; CHECK-LABEL: oeq_2f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: ret
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%y = fcmp oeq <vscale x 2 x float> %x, %x2
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ret <vscale x 2 x i1> %y
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}
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define <vscale x 2 x i1> @ueq_2f32(<vscale x 2 x float> %x, <vscale x 2 x float> %x2) {
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; CHECK-LABEL: ueq_2f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcmne p1.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ueq <vscale x 2 x float> %x, %x2
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ret <vscale x 2 x i1> %y
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}
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define <vscale x 2 x i1> @oeq_2f64(<vscale x 2 x double> %x, <vscale x 2 x double> %x2) {
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; CHECK-LABEL: oeq_2f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d
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; CHECK-NEXT: ret
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%y = fcmp oeq <vscale x 2 x double> %x, %x2
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ret <vscale x 2 x i1> %y
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}
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define <vscale x 2 x i1> @ueq_2f64(<vscale x 2 x double> %x, <vscale x 2 x double> %x2) {
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; CHECK-LABEL: ueq_2f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcmne p1.d, p0/z, z0.d, z1.d
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ueq <vscale x 2 x double> %x, %x2
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ret <vscale x 2 x i1> %y
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}
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define <vscale x 2 x i1> @oeq_2f16(<vscale x 2 x half> %x, <vscale x 2 x half> %x2) {
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; CHECK-LABEL: oeq_2f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcmeq p0.h, p0/z, z0.h, z1.h
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; CHECK-NEXT: ret
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%y = fcmp oeq <vscale x 2 x half> %x, %x2
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ret <vscale x 2 x i1> %y
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}
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define <vscale x 2 x i1> @ueq_2f16(<vscale x 2 x half> %x, <vscale x 2 x half> %x2) {
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; CHECK-LABEL: ueq_2f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcmne p1.h, p0/z, z0.h, z1.h
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ueq <vscale x 2 x half> %x, %x2
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ret <vscale x 2 x i1> %y
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}
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define <vscale x 4 x i1> @oeq_4f16(<vscale x 4 x half> %x, <vscale x 4 x half> %x2) {
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; CHECK-LABEL: oeq_4f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmeq p0.h, p0/z, z0.h, z1.h
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; CHECK-NEXT: ret
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%y = fcmp oeq <vscale x 4 x half> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 4 x i1> @ueq_4f16(<vscale x 4 x half> %x, <vscale x 4 x half> %x2) {
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; CHECK-LABEL: ueq_4f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmne p1.h, p0/z, z0.h, z1.h
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ueq <vscale x 4 x half> %x, %x2
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ret <vscale x 4 x i1> %y
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}
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define <vscale x 8 x i1> @oeq_8f16(<vscale x 8 x half> %x, <vscale x 8 x half> %x2) {
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; CHECK-LABEL: oeq_8f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: fcmeq p0.h, p0/z, z0.h, z1.h
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; CHECK-NEXT: ret
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%y = fcmp oeq <vscale x 8 x half> %x, %x2
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ret <vscale x 8 x i1> %y
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}
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define <vscale x 8 x i1> @ueq_8f16(<vscale x 8 x half> %x, <vscale x 8 x half> %x2) {
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; CHECK-LABEL: ueq_8f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: fcmne p1.h, p0/z, z0.h, z1.h
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; CHECK-NEXT: not p0.b, p0/z, p1.b
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; CHECK-NEXT: ret
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%y = fcmp ueq <vscale x 8 x half> %x, %x2
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ret <vscale x 8 x i1> %y
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}
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define <vscale x 4 x i32> @oeq_4f32_sext(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: oeq_4f32_sext:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: mov z0.s, p0/z, #-1 // =0xffffffffffffffff
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; CHECK-NEXT: ret
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%y = fcmp oeq <vscale x 4 x float> %x, %x2
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%r = sext <vscale x 4 x i1> %y to <vscale x 4 x i32>
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ret <vscale x 4 x i32> %r
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}
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define <vscale x 4 x i32> @oeq_4f32_zext(<vscale x 4 x float> %x, <vscale x 4 x float> %x2) {
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; CHECK-LABEL: oeq_4f32_zext:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, z1.s
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; CHECK-NEXT: mov z0.s, p0/z, #1 // =0x1
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; CHECK-NEXT: ret
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%y = fcmp oeq <vscale x 4 x float> %x, %x2
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%r = zext <vscale x 4 x i1> %y to <vscale x 4 x i32>
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ret <vscale x 4 x i32> %r
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}
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