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https://github.com/RPCS3/llvm-mirror.git
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ac195a6f2b
Summary: This patch fixes comparison of 64-bit atomic with its expected value in CMP_SWAP_64 expansion. Currently, the low words are compared with CMP, while the high words are compared with SBC. SBC expects the carry flag to be set if CMP detects a difference. CMP might leave the carry unset for unequal arguments though if the first one is >= than the second. This might cause the comparison logic to detect false equality. Example of the broken C++ code: ``` std::atomic<long long> at(2); long long ll = 1; std::atomic_compare_exchange_strong(&at, &ll, 3); ``` Even though the atomic `at` and the expected value `ll` are not equal and `atomic_compare_exchange_strong` returns `false`, `at` is changed to 3. The patch replaces SBC with CMPEQ. Reviewers: t.p.northover Subscribers: aemerson, rengolin, llvm-commits, asl Differential Revision: https://reviews.llvm.org/D27315 llvm-svn: 288433
114 lines
3.9 KiB
LLVM
114 lines
3.9 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=armv7-linux-gnu -O0 %s -o - | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=thumbv8-linux-gnu -O0 %s -o - | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=thumbv6m-none-eabi -O0 %s -o - | FileCheck %s --check-prefix=CHECK-T1
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; CHECK-T1-NOT: ldrex
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; CHECK-T1-NOT: strex
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define { i8, i1 } @test_cmpxchg_8(i8* %addr, i8 %desired, i8 %new) nounwind {
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; CHECK-LABEL: test_cmpxchg_8:
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; CHECK: dmb ish
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; CHECK: uxtb [[DESIRED:r[0-9]+]], [[DESIRED]]
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrexb [[OLD:r[0-9]+]], [r0]
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; CHECK: cmp [[OLD]], [[DESIRED]]
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strexb [[STATUS:r[0-9]+]], r2, [r0]
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: cmp{{(\.w)?}} [[OLD]], [[DESIRED]]
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; CHECK: {{moveq|movweq}} {{r[0-9]+}}, #1
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; CHECK: dmb ish
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%res = cmpxchg i8* %addr, i8 %desired, i8 %new seq_cst monotonic
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ret { i8, i1 } %res
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}
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define { i16, i1 } @test_cmpxchg_16(i16* %addr, i16 %desired, i16 %new) nounwind {
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; CHECK-LABEL: test_cmpxchg_16:
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; CHECK: dmb ish
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; CHECK: uxth [[DESIRED:r[0-9]+]], [[DESIRED]]
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrexh [[OLD:r[0-9]+]], [r0]
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; CHECK: cmp [[OLD]], [[DESIRED]]
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strexh [[STATUS:r[0-9]+]], r2, [r0]
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: cmp{{(\.w)?}} [[OLD]], [[DESIRED]]
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; CHECK: {{moveq|movweq}} {{r[0-9]+}}, #1
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; CHECK: dmb ish
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%res = cmpxchg i16* %addr, i16 %desired, i16 %new seq_cst monotonic
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ret { i16, i1 } %res
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}
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define { i32, i1 } @test_cmpxchg_32(i32* %addr, i32 %desired, i32 %new) nounwind {
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; CHECK-LABEL: test_cmpxchg_32:
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; CHECK: dmb ish
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; CHECK-NOT: uxt
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrex [[OLD:r[0-9]+]], [r0]
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; CHECK: cmp [[OLD]], [[DESIRED]]
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strex [[STATUS:r[0-9]+]], r2, [r0]
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: cmp{{(\.w)?}} [[OLD]], [[DESIRED]]
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; CHECK: {{moveq|movweq}} {{r[0-9]+}}, #1
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; CHECK: dmb ish
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%res = cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst monotonic
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ret { i32, i1 } %res
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}
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define { i64, i1 } @test_cmpxchg_64(i64* %addr, i64 %desired, i64 %new) nounwind {
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; CHECK-LABEL: test_cmpxchg_64:
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; CHECK: dmb ish
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; CHECK-NOT: uxt
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrexd [[OLDLO:r[0-9]+]], [[OLDHI:r[0-9]+]], [r0]
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; CHECK: cmp [[OLDLO]], r6
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; CHECK: cmpeq [[OLDHI]], r7
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strexd [[STATUS:r[0-9]+]], r4, r5, [r0]
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: dmb ish
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%res = cmpxchg i64* %addr, i64 %desired, i64 %new seq_cst monotonic
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ret { i64, i1 } %res
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}
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define { i64, i1 } @test_nontrivial_args(i64* %addr, i64 %desired, i64 %new) {
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; CHECK-LABEL: test_nontrivial_args:
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; CHECK: dmb ish
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; CHECK-NOT: uxt
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; CHECK: [[RETRY:.LBB[0-9]+_[0-9]+]]:
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; CHECK: ldrexd [[OLDLO:r[0-9]+]], [[OLDHI:r[0-9]+]], [r0]
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; CHECK: cmp [[OLDLO]], {{r[0-9]+}}
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; CHECK: cmpeq [[OLDHI]], {{r[0-9]+}}
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; CHECK: bne [[DONE:.LBB[0-9]+_[0-9]+]]
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; CHECK: strexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r0]
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; CHECK: cmp{{(\.w)?}} [[STATUS]], #0
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; CHECK: bne [[RETRY]]
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; CHECK: [[DONE]]:
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; CHECK: dmb ish
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%desired1 = add i64 %desired, 1
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%new1 = add i64 %new, 1
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%res = cmpxchg i64* %addr, i64 %desired1, i64 %new1 seq_cst seq_cst
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ret { i64, i1 } %res
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}
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; The following used to trigger an assertion when creating a spill on thumb2
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; for a physreg with RC==GPRPairRegClass.
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; CHECK-LABEL: test_cmpxchg_spillbug:
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; CHECK: ldrexd
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; CHECK: strexd
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; CHECK: bne
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define void @test_cmpxchg_spillbug() {
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%v = cmpxchg i64* undef, i64 undef, i64 undef seq_cst seq_cst
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ret void
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}
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