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7cd663b80c
Generally, the ISEL is expanded into if-then-else sequence, in some cases (like when the destination register is the same with the true or false value register), it may just be expanded into just the if or else sequence. llvm-svn: 292154
44 lines
1.6 KiB
LLVM
44 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs -ppc-gen-isel=false | FileCheck --check-prefix=CHECK-NO-ISEL %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) {
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entry:
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%sext82 = shl i32 %d, 16
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%conv29 = ashr exact i32 %sext82, 16
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%cmp = icmp slt i32 %sext82, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %sw.epilog
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%and33 = and i32 %conv29, 32767
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%sub34 = sub nsw i32 %a, %and33
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br label %cond.end
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cond.false: ; preds = %sw.epilog
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%add37 = add nsw i32 %conv29, %a
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br label %cond.end
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; CHECK-LABEL: @test
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; CHECK-NO-ISEL-LABEL: @test
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; CHECK: add [[REG:[0-9]+]],
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; CHECK: subf [[REG2:[0-9]+]],
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; CHECK: isel {{[0-9]+}}, [[REG]], [[REG2]],
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; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]]
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; CHECK-NO-ISEL-NEXT: b [[SUCCESSOR:.LBB[0-9]+]]
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; CHECK-NO-ISEL: [[TRUE]]
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; CHECK-NO-ISEL-NEXT: addi 5, 6, 0
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; CHECK-NO-ISEL: extsh 5, 5
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; CHECK-NO-ISEL-NEXT: add 3, 3, 5
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; CHECK-NO-ISEL-NEXT: blr
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i32 [ %sub34, %cond.true ], [ %add37, %cond.false ]
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%sext83 = shl i32 %cond, 16
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%conv39 = ashr exact i32 %sext83, 16
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%add41 = sub i32 %b, %a
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%sub43 = add i32 %add41, %conv39
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ret i32 %sub43
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}
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