Sean Fertile da4254727a [PowerPC][MC] Support expressions in getMemRIX16Encoding. ...

Loosens an assert in getMemRIX16Encoding that restricts DQ-form instructions to
using an immediate, so that we can assemble instructions like lxv/stxv where the
offset is an expression.

Differential Revision: https://reviews.llvm.org/D51122

llvm-svn: 340761

2018-08-27 17:37:43 +00:00

..

AArch64

[AArch64] Add Tiny Code Model for AArch64

2018-08-22 11:31:39 +00:00

AMDGPU

[AMDGPU] New tbuffer intrinsics

2018-08-21 11:06:05 +00:00

ARM

[ARM/AArch64] Support FP16 +fp16fml instructions

2018-08-17 11:29:49 +00:00

AsmParser

[AsmParser] Fix preserve-comments-crlf.s on FreeBSD

2018-07-26 06:07:03 +00:00

AVR

[AVR] Implement some missing code paths

2017-12-11 11:01:27 +00:00

BPF

bpf: New disassembler testcases for 32-bit subregister support

2018-02-23 23:49:35 +00:00

COFF

MC: Don't align COFF section contents.

2018-08-23 05:39:36 +00:00

Disassembler

[WebAssembly] Added default stack-only instruction mode for MC.

2018-08-27 15:45:51 +00:00

ELF

MC: Teach the COFF object writer to write address-significance tables.

2018-08-22 23:58:16 +00:00

Hexagon

Check for tied operands

2018-08-13 14:01:25 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

[MC] Error on a .zerofill directive in a non-virtual section

2018-07-02 17:29:43 +00:00

Mips

[mips] Replace custom parsing logic for data directives by the addAliasForDirective

2018-07-25 07:07:43 +00:00

PowerPC

[PowerPC][MC] Support expressions in getMemRIX16Encoding.

2018-08-27 17:37:43 +00:00

RISCV

[RISCV] Fixed Assertion`Kind == Immediate && "Invalid type access!"' failed.

2018-08-24 23:47:49 +00:00

Sparc

[Sparc] Avoid writing outside array in applyFixup

2018-08-27 11:43:59 +00:00

SystemZ

[SystemZ, AsmParser] Enable the mnemonic spell corrector.

2017-07-18 09:17:00 +00:00

WebAssembly

[WebAssembly] Added default stack-only instruction mode for MC.

2018-08-27 15:45:51 +00:00

X86

[MC][X86] Enhance X86 Register expression handling to more closely match GCC.

2018-08-16 16:31:14 +00:00