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0f6e617e90
This somehow got missed in the AArch64 merge, so should fix a performance regression since 3.4. llvm-svn: 210984
25 lines
594 B
LLVM
25 lines
594 B
LLVM
; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s
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; CHECK: fptosi_1
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; CHECK: fcvtzs.2d
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; CHECK: xtn.2s
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; CHECK: ret
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define void @fptosi_1(<2 x double> %in, <2 x i32>* %addr) nounwind noinline ssp {
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entry:
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%0 = fptosi <2 x double> %in to <2 x i32>
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store <2 x i32> %0, <2 x i32>* %addr, align 8
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ret void
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}
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; CHECK: fptoui_1
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; CHECK: fcvtzu.2d
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; CHECK: xtn.2s
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; CHECK: ret
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define void @fptoui_1(<2 x double> %in, <2 x i32>* %addr) nounwind noinline ssp {
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entry:
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%0 = fptoui <2 x double> %in to <2 x i32>
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store <2 x i32> %0, <2 x i32>* %addr, align 8
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ret void
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}
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