1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00
llvm-mirror/test/CodeGen/AArch64/arm64-complex-copy-noneon.ll
David Blaikie ab043ff680 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794
2015-02-27 21:17:42 +00:00

22 lines
960 B
LLVM

; RUN: llc -mtriple=arm64-none-linux-gnu -mattr=-neon < %s
; The DAG combiner decided to use a vector load/store for this struct copy
; previously. This probably shouldn't happen without NEON, but the most
; important thing is that it compiles.
define void @store_combine() nounwind {
%src = alloca { double, double }, align 8
%dst = alloca { double, double }, align 8
%src.realp = getelementptr inbounds { double, double }, { double, double }* %src, i32 0, i32 0
%src.real = load double, double* %src.realp
%src.imagp = getelementptr inbounds { double, double }, { double, double }* %src, i32 0, i32 1
%src.imag = load double, double* %src.imagp
%dst.realp = getelementptr inbounds { double, double }, { double, double }* %dst, i32 0, i32 0
%dst.imagp = getelementptr inbounds { double, double }, { double, double }* %dst, i32 0, i32 1
store double %src.real, double* %dst.realp
store double %src.imag, double* %dst.imagp
ret void
}