Zlatko Buljan 0fef23e430 [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions ... Differential Revision: http://reviews.llvm.org/D16182 llvm-svn: 269752		2016-05-17 09:32:58 +00:00
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AArch64	add support for -print-imm-hex for AArch64	2016-05-13 18:00:09 +00:00
AMDGPU	[AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.	2016-05-06 17:48:48 +00:00
ARM	[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.	2016-04-19 23:51:52 +00:00
Hexagon	[Hexagon] Treat all conditional branches as predicted (not-taken by default)	2016-05-09 18:22:07 +00:00
Lanai	[lanai] Add Lanai backend.	2016-03-28 13:09:54 +00:00
Mips	[mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions	2016-05-17 09:32:58 +00:00
PowerPC	This reverts commit r265505.	2016-04-28 20:00:42 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Support LRVH and STRVH opcodes	2016-05-16 20:32:22 +00:00
X86	AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.	2016-02-25 13:30:17 +00:00
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