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are more expensive than the non-flag setting variant. Teach thumb2 size reduction pass to avoid generating them unless we are optimizing for size. rdar://12892707 llvm-svn: 170728
105 lines
2.4 KiB
LLVM
105 lines
2.4 KiB
LLVM
; RUN: llc < %s -march=thumb -mcpu=cortex-a8 | FileCheck %s --check-prefix=A8
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; RUN: llc < %s -march=thumb -mcpu=swift | FileCheck %s --check-prefix=SWIFT
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; rdar://12892707
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define i32 @t2ADDrs_lsl(i32 %X, i32 %Y) {
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; A8: t2ADDrs_lsl
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; A8: add.w r0, r0, r1, lsl #16
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%A = shl i32 %Y, 16
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%B = add i32 %X, %A
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ret i32 %B
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}
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define i32 @t2ADDrs_lsr(i32 %X, i32 %Y) {
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; A8: t2ADDrs_lsr
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; A8: add.w r0, r0, r1, lsr #16
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%A = lshr i32 %Y, 16
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%B = add i32 %X, %A
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ret i32 %B
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}
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define i32 @t2ADDrs_asr(i32 %X, i32 %Y) {
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; A8: t2ADDrs_asr
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; A8: add.w r0, r0, r1, asr #16
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%A = ashr i32 %Y, 16
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%B = add i32 %X, %A
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ret i32 %B
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}
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; i32 ror(n) = (x >> n) | (x << (32 - n))
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define i32 @t2ADDrs_ror(i32 %X, i32 %Y) {
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; A8: t2ADDrs_ror
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; A8: add.w r0, r0, r1, ror #16
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%A = lshr i32 %Y, 16
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%B = shl i32 %Y, 16
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%C = or i32 %B, %A
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%R = add i32 %X, %C
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ret i32 %R
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}
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define i32 @t2ADDrs_noRegShift(i32 %X, i32 %Y, i8 %sh) {
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; A8: t2ADDrs_noRegShift
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; A8: uxtb r2, r2
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; A8: lsls r1, r2
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; A8: add r0, r1
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; SWIFT: t2ADDrs_noRegShift
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; SWIFT-NOT: lsls
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; SWIFT: lsl.w
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%shift.upgrd.1 = zext i8 %sh to i32
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%A = shl i32 %Y, %shift.upgrd.1
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%B = add i32 %X, %A
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ret i32 %B
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}
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define i32 @t2ADDrs_noRegShift2(i32 %X, i32 %Y, i8 %sh) {
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; A8: t2ADDrs_noRegShift2
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; A8: uxtb r2, r2
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; A8: lsrs r1, r2
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; A8: add r0, r1
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; SWIFT: t2ADDrs_noRegShift2
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; SWIFT-NOT: lsrs
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; SWIFT: lsr.w
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%shift.upgrd.1 = zext i8 %sh to i32
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%A = lshr i32 %Y, %shift.upgrd.1
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%B = add i32 %X, %A
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ret i32 %B
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}
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define i32 @t2ADDrs_noRegShift3(i32 %X, i32 %Y, i8 %sh) {
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; A8: t2ADDrs_noRegShift3
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; A8: uxtb r2, r2
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; A8: asrs r1, r2
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; A8: add r0, r1
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; SWIFT: t2ADDrs_noRegShift3
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; SWIFT-NOT: asrs
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; SWIFT: asr.w
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%shift.upgrd.1 = zext i8 %sh to i32
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%A = ashr i32 %Y, %shift.upgrd.1
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%B = add i32 %X, %A
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ret i32 %B
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}
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define i32 @t2ADDrs_optsize(i32 %X, i32 %Y, i8 %sh) optsize {
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; SWIFT: t2ADDrs_optsize
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; SWIFT-NOT: lsl.w
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; SWIFT: lsls
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%shift.upgrd.1 = zext i8 %sh to i32
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%A = shl i32 %Y, %shift.upgrd.1
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%B = add i32 %X, %A
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ret i32 %B
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}
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define i32 @t2ADDrs_minsize(i32 %X, i32 %Y, i8 %sh) minsize {
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; SWIFT: t2ADDrs_minsize
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; SWIFT-NOT: lsr.w
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; SWIFT: lsrs
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%shift.upgrd.1 = zext i8 %sh to i32
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%A = lshr i32 %Y, %shift.upgrd.1
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%B = add i32 %X, %A
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ret i32 %B
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}
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