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b3487aa334
This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. llvm-svn: 157027
59 lines
1.2 KiB
LLVM
59 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s
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; These tests would be improved by 'movs r0, #0' being rematerialized below the
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; tst as 'mov.w r0, #0'.
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define i1 @f2(i32 %a, i32 %b) {
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; CHECK: f2
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; CHECK: teq.w {{.*}}, r1
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%tmp = xor i32 %a, %b
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%tmp1 = icmp eq i32 %tmp, 0
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ret i1 %tmp1
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}
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define i1 @f4(i32 %a, i32 %b) {
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; CHECK: f4
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; CHECK: teq.w {{.*}}, r1
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%tmp = xor i32 %a, %b
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%tmp1 = icmp eq i32 0, %tmp
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ret i1 %tmp1
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}
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define i1 @f6(i32 %a, i32 %b) {
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; CHECK: f6
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; CHECK: teq.w {{.*}}, r1, lsl #5
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%tmp = shl i32 %b, 5
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%tmp1 = xor i32 %a, %tmp
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%tmp2 = icmp eq i32 %tmp1, 0
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ret i1 %tmp2
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}
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define i1 @f7(i32 %a, i32 %b) {
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; CHECK: f7
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; CHECK: teq.w {{.*}}, r1, lsr #6
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%tmp = lshr i32 %b, 6
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%tmp1 = xor i32 %a, %tmp
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%tmp2 = icmp eq i32 %tmp1, 0
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ret i1 %tmp2
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}
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define i1 @f8(i32 %a, i32 %b) {
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; CHECK: f8
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; CHECK: teq.w {{.*}}, r1, asr #7
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%tmp = ashr i32 %b, 7
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%tmp1 = xor i32 %a, %tmp
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%tmp2 = icmp eq i32 %tmp1, 0
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ret i1 %tmp2
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}
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define i1 @f9(i32 %a, i32 %b) {
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; CHECK: f9
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; CHECK: teq.w {{.*}}, {{.*}}, ror #8
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%l8 = shl i32 %a, 24
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%r8 = lshr i32 %a, 8
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%tmp = or i32 %l8, %r8
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%tmp1 = xor i32 %a, %tmp
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%tmp2 = icmp eq i32 %tmp1, 0
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ret i1 %tmp2
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}
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