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Eli Friedman 1031830a08 [ARM] VFPv2 only supports 16 D registers.
r361845 changed the way we handle "D16" vs. "D32" targets; there used to
be a negative "d16" which removed instructions from the instruction set,
and now there's a "d32" feature which adds instructions to the
instruction set.  This is good, but there was an oversight in the
implementation: the behavior of VFPv2 was changed.  In particular, the
"vfp2" feature was changed to imply "d32". This is wrong: VFPv2 only
supports 16 D registers.

In practice, this means if you specify -mfpu=vfpv2, the compiler will
generate illegal instructions.

This patch gets rid of "vfp2d16" and "vfp2d16sp", and fixes "vfp2" and
"vfp2sp" so they don't imply "d32".

Differential Revision: https://reviews.llvm.org/D67375

llvm-svn: 372186
2019-09-17 21:42:38 +00:00
2019-08-15 10:55:25 +00:00
2019-09-17 20:31:01 +00:00
2019-09-17 19:41:36 +00:00
2016-01-26 21:29:08 +00:00
2019-07-17 07:02:02 +00:00
2019-02-19 20:38:51 +00:00

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