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llvm-mirror/test/MC/Disassembler/X86/enhanced.txt
Sean Callanan e1308394f1 Fixed a bug in the enhanced disassembler that caused
it to ignore valid uses of FS and GS as additional
base registers in address computations.  Added a test
case for this.

llvm-svn: 126302
2011-02-23 03:31:28 +00:00

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# RUN: llvm-mc --edis %s -triple=x86_64-apple-darwin9 |& FileCheck %s
# CHECK: [o:jne][w: ][0-p:-][0-l:10=10] <br> 0:[RIP/111](pc)=18446744073709551606
0x0f 0x85 0xf6 0xff 0xff 0xff
# CHECK: [o:movq][w: ][1-r:%gs=r63][1-p::][1-l:8=8][p:,][w: ][0-r:%rcx=r108] <mov> 0:[RCX/108]=0 1:[GS/63]=8
0x65 0x48 0x8b 0x0c 0x25 0x08 0x00 0x00 0x00